Design and test of analog circuits towards sub-ppm level

© 2014 IEEE. Electronics are increasingly being embedded in a growing number of applications in our daily life. This demands strong reliability and robustness of those electronic systems. The IC manufacturing process not being perfect, however, inevitably results in some fabricated parts having defects. Test methods must detect such faulty ICs before shipment. While the fault coverage of testing for digital integrated circuits in industry today already reaches the sub-ppm level, this is not yet the case for analog integrated circuits or the analog part in mixed-signal ICs. This invited talk will review some techniques that are being explored in industrial practice to aim for sub-ppm-level coverage for the analog and mixed-signal circuits as well. This will be illustrated with some practical examples from automotive IC designs.