Modeling and Exploration of Novel Non-Volatile Memory Technologies (Modeling en exploratie voor nieuwe niet-vluchtig geheugen technologieën)

Using the proposed heuristic methodology in this PhD work of the gate irregularity and its verification against TCAD simulations. Using the proposed model it is possible to benchmark the lithography processes versus error correcting codes improving the process technologies by either introducing the smoothing techniques or by increasing ECCs complexities.