Exploiting Static Non-Uniform Cache Architectures for Hard Real-Time Computing
High-performance processors using Non-Uniform Cache Architecture (NUCA) are increasingly used to deal with the growing wire delays in multicore/manycore processors. Due to the convergence of high-performance computing with embedded computing, NUCA caches are expected to benefit high-end embedded sys...
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Veröffentlicht in: | Journal of computing science and engineering : JCSE 2015, Vol.9 (4), p.177-189 |
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Hauptverfasser: | , |
Format: | Artikel |
Sprache: | kor |
Online-Zugang: | Volltext |
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Zusammenfassung: | High-performance processors using Non-Uniform Cache Architecture (NUCA) are increasingly used to deal with the growing wire delays in multicore/manycore processors. Due to the convergence of high-performance computing with embedded computing, NUCA caches are expected to benefit high-end embedded systems as well. However, for real-time systems that use multicore processors with NUCA caches, it is crucial to bound worst-case execution time (WCET) accurately and safely. In this paper, we developed a WCET analysis approach by considering the effect of static NUCA caches on WCET. We compared the WCET in real-time applications with different topologies of static NUCA caches. Our experimental results demonstrated that the static NUCA cache could improve the worst-case performance of realtime applications using multicore processor compared to the cache with uniform access time. |
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ISSN: | 1976-4677 |