Ge Nano-Heteroepitaxy: From Nano-Pillars to Thick Coalesced Layers

Ge co-integration with Si has always attracted a lot of attention. Thanks to its superior electronic properties, Ge can be used as a channel material in p-type Metal Oxide Semiconductor transistors (high hole mobility) or low power devices such as tunnelling field effect transistors (steep sub-thres...

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Veröffentlicht in:Meeting abstracts (Electrochemical Society) 2022-10, Vol.MA2022-02 (32), p.1229-1229
Hauptverfasser: Mastari, Marouane, Charles, Matthew, Pimenta-Barros, Patricia, Argoud, Maxime, Tiron, Raluca, Papon, Anne-Marie, Chevalier, Nicolas, Hartmann, Jean-Michel, Landru, Didier, Kim, Young-Pil, Kononchuk, Oleg
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Sprache:eng
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Zusammenfassung:Ge co-integration with Si has always attracted a lot of attention. Thanks to its superior electronic properties, Ge can be used as a channel material in p-type Metal Oxide Semiconductor transistors (high hole mobility) or low power devices such as tunnelling field effect transistors (steep sub-threshold swing operation). Furthermore, Ge is a key enabler in numerous optoelectronic devices (light emitters and photo-detectors). The epitaxial growth of Ge on Si is far from being lattice matched, with a 4.2% difference between Si and Ge, making high quality growth difficult, especially for thick layers. Several schemes have been explored in the literature to obtain thick, good crystalline quality Ge layers, such as a low temperature/high temperature approach followed by a cyclic anneal which yielded flat, slightly tensile strained thick Ge layers with threading dislocation densities around 10 7 cm -2 . Other methods based on epitaxial lateral overgrowth, aspect ratio trapping and 3D heteroepitaxy of Ge films on patterned Si substrates have shown promising results thanks to defect blocking against sidewalls or their containment in certain directions. However, some planar defects were still present at the coalescence fronts with those growth methods. Another interesting method is to perform a heteroepitaxy of Ge in nanometer-size Si windows surrounded by SiO 2 . Lee et al [1] succeeded in obtaining high quality Ge layers using nano-heteroepitaxy but did not go further in the analysis of defects generated with such an approach. In a previous work [2], we were able to obtain smooth, fully strain relaxed Si 0.76 Ge 0.24 layers with heteroepitaxial growth in nanometer-size Si windows surrounded by SiO 2 . In that case, SiGe epitaxial growth was carried out on a patterned substrate with a regular array of nanometre-size seed pillars, and growth fronts from individual nano-pillars coalesced to form complete 2D layers. However, planar defects such as stacking faults and twins were present in the final layers. In this work, we wanted to test this growth approach for pure Ge and provide an in-depth analysis of any defects generated. An original process flow based on diblock copolymer patterning was thus used to fabricate nanometer-size SiO 2 based templates for growth ( Figure 1a ). The nano-heteroepitaxy of 2D Ge layers on these templates was performed at 90 Torr, using GeH 4 as a precursor, and compared to growth on blanket Si. Ge nano-pillar growth was first investigat
ISSN:2151-2043
2151-2035
DOI:10.1149/MA2022-02321229mtgabs