Integration of a Manufacturing Grade, k = 2.0 Spin-On Material in a Single Damascene Structure

Ultra low dielectric constant materials with k < 2.4 are needed to keep improving microprocessor performance in future technology nodes. With current PECVD and spin-on materials, the level of porosity introduced dictates the final dielectric constant. Furthermore, the pore size distribution and connectivity increase when decreasing the k, aggravating many of the integration issues already observed during the processing of k = 2.7 and 2.4 materials. In this paper, we describe the integration of a mesoporous k = 2.0 microelectronic grade spin-on formulation (LKD 6504) in single damascene structures using a via-first strategy at line and the space dimensions corresponding to the 2X levels of 130 nm technology nodes. We demonstrated that significant damage occurs, in particular, during the photoresist strip due to the presence of interconnected mesopores even at this feature size. The appropriate choice of strip chemistry, coupled with vapor phase silylation (dielectric repair), guarantees low leakage currents and capacitance values in the final integrated structures. This study constitutes a proof of concept that highly porous k = 2.0 materials can be integrated using currently available semiconductor manufacturing processes.