Microsecond Crystallization of Amorphous Silicon Films on Glass Substrates by Joule Heating
Joule-heating-induced crystallization (JIC) of amorphous silicon (a-Si) films was conducted by applying an electric pulse to a conductive layer located beneath or above the films. Crystallization occurs across the whole substrate surface within few tens of microseconds. The phase-transformation phen...
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creator | Hong, Won-Eui Ro, Jae-Sang |
description | Joule-heating-induced crystallization (JIC) of amorphous silicon (a-Si) films was conducted by applying an electric pulse to a conductive layer located beneath or above the films. Crystallization occurs across the whole substrate surface within few tens of microseconds. The phase-transformation phenomena during the JIC process were detected electrically and optically by the in-situ measurements of input voltage/current and normal reflectance at wavelength of 532 nm. We devised a method for the crystallization of a-Si films while preventing arc generation; this method consisted of pre-patterning an a-Si active layer into islands and then depositing a gate oxide and gate electrode. Electric pulsing was then applied to the gate electrode formed using a Mo layer. JIC-processed poly-Si thin-film transistors were fabricated successfully, and the proposed method was found to be compatible with the standard processing of coplanar top-gate poly-Si TFTs. The p-channel JIC poly-Si TFT with W/L = 7 μm/7 μm exhibited a field effect mobility of 38.9 cm2/V-s, a threshold voltage of −2.8 V, and a gate voltage swing of 0.35 V/dec. |
doi_str_mv | 10.1149/2.0031612jss |
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Crystallization occurs across the whole substrate surface within few tens of microseconds. The phase-transformation phenomena during the JIC process were detected electrically and optically by the in-situ measurements of input voltage/current and normal reflectance at wavelength of 532 nm. We devised a method for the crystallization of a-Si films while preventing arc generation; this method consisted of pre-patterning an a-Si active layer into islands and then depositing a gate oxide and gate electrode. Electric pulsing was then applied to the gate electrode formed using a Mo layer. JIC-processed poly-Si thin-film transistors were fabricated successfully, and the proposed method was found to be compatible with the standard processing of coplanar top-gate poly-Si TFTs. The p-channel JIC poly-Si TFT with W/L = 7 μm/7 μm exhibited a field effect mobility of 38.9 cm2/V-s, a threshold voltage of −2.8 V, and a gate voltage swing of 0.35 V/dec.</description><identifier>ISSN: 2162-8769</identifier><identifier>EISSN: 2162-8769</identifier><identifier>EISSN: 2162-8777</identifier><identifier>DOI: 10.1149/2.0031612jss</identifier><language>eng</language><publisher>The Electrochemical Society</publisher><ispartof>ECS journal of solid state science and technology, 2016-01, Vol.5 (10), p.R187-R191</ispartof><rights>The Author(s) 2016. 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Technol</addtitle><description>Joule-heating-induced crystallization (JIC) of amorphous silicon (a-Si) films was conducted by applying an electric pulse to a conductive layer located beneath or above the films. Crystallization occurs across the whole substrate surface within few tens of microseconds. The phase-transformation phenomena during the JIC process were detected electrically and optically by the in-situ measurements of input voltage/current and normal reflectance at wavelength of 532 nm. We devised a method for the crystallization of a-Si films while preventing arc generation; this method consisted of pre-patterning an a-Si active layer into islands and then depositing a gate oxide and gate electrode. Electric pulsing was then applied to the gate electrode formed using a Mo layer. JIC-processed poly-Si thin-film transistors were fabricated successfully, and the proposed method was found to be compatible with the standard processing of coplanar top-gate poly-Si TFTs. The p-channel JIC poly-Si TFT with W/L = 7 μm/7 μm exhibited a field effect mobility of 38.9 cm2/V-s, a threshold voltage of −2.8 V, and a gate voltage swing of 0.35 V/dec.</description><issn>2162-8769</issn><issn>2162-8769</issn><issn>2162-8777</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2016</creationdate><recordtype>article</recordtype><sourceid>O3W</sourceid><recordid>eNptkLFOwzAQhi0EElXpxgN4ZCAltmMnGauKtqAiBmBiiGzHAUdOXPmSITw9rooEA7fcr7vvTnc_QtckXRKSlXd0maaMCEJbgDM0o0TQpMhFef5HX6IFQJvGEEWWMzpD709WBw9G-77G6zDBIJ2zX3Kwvse-wavOh8OnHwG_WGcjhTfWdYCj2DoJsTwqGIIcDGA14Uc_OoN3Js73H1foopEOzOInz9Hb5v51vUv2z9uH9WqfaCrYkJQ501xppkRdsqxWrMml1KzQmmuiVCOUKmJDZlIIzlOZs1JJXpOM04ZLYdgc3Z72Hj-BYJrqEGwnw1SRtDp6U9Hq15uI35xw6w9V68fQx-P-R78By7BluA</recordid><startdate>201601</startdate><enddate>201601</enddate><creator>Hong, Won-Eui</creator><creator>Ro, Jae-Sang</creator><general>The Electrochemical Society</general><scope>O3W</scope><scope>TSCCA</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>201601</creationdate><title>Microsecond Crystallization of Amorphous Silicon Films on Glass Substrates by Joule Heating</title><author>Hong, Won-Eui ; Ro, Jae-Sang</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c263t-973c5bc3b6d934db3f7aac38cc5c1bbf6bb8934a4a66550a739ba5d1452f5a6e3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2016</creationdate><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Hong, Won-Eui</creatorcontrib><creatorcontrib>Ro, Jae-Sang</creatorcontrib><collection>IOP Publishing Free Content</collection><collection>IOPscience (Open Access)</collection><collection>CrossRef</collection><jtitle>ECS journal of solid state science and technology</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Hong, Won-Eui</au><au>Ro, Jae-Sang</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Microsecond Crystallization of Amorphous Silicon Films on Glass Substrates by Joule Heating</atitle><jtitle>ECS journal of solid state science and technology</jtitle><addtitle>ECS J. Solid State Sci. Technol</addtitle><date>2016-01</date><risdate>2016</risdate><volume>5</volume><issue>10</issue><spage>R187</spage><epage>R191</epage><pages>R187-R191</pages><issn>2162-8769</issn><eissn>2162-8769</eissn><eissn>2162-8777</eissn><abstract>Joule-heating-induced crystallization (JIC) of amorphous silicon (a-Si) films was conducted by applying an electric pulse to a conductive layer located beneath or above the films. Crystallization occurs across the whole substrate surface within few tens of microseconds. The phase-transformation phenomena during the JIC process were detected electrically and optically by the in-situ measurements of input voltage/current and normal reflectance at wavelength of 532 nm. We devised a method for the crystallization of a-Si films while preventing arc generation; this method consisted of pre-patterning an a-Si active layer into islands and then depositing a gate oxide and gate electrode. Electric pulsing was then applied to the gate electrode formed using a Mo layer. JIC-processed poly-Si thin-film transistors were fabricated successfully, and the proposed method was found to be compatible with the standard processing of coplanar top-gate poly-Si TFTs. The p-channel JIC poly-Si TFT with W/L = 7 μm/7 μm exhibited a field effect mobility of 38.9 cm2/V-s, a threshold voltage of −2.8 V, and a gate voltage swing of 0.35 V/dec.</abstract><pub>The Electrochemical Society</pub><doi>10.1149/2.0031612jss</doi><tpages>5</tpages><oa>free_for_read</oa></addata></record> |
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title | Microsecond Crystallization of Amorphous Silicon Films on Glass Substrates by Joule Heating |
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