(Invited) Sub-40mV Sigma VTH Igzo nFETs in 300mm Fab

Back and double gate IGZO nFETs have been demonstrated down to 120nm and 70nm respectively leveraging 300mm fab processing. While the passivation of oxygen vacancies in IGZO is challenging with an integration of front side gate, a scaled back gated flow has been optimized by multiplying design of ex...

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Veröffentlicht in:ECS transactions 2020-09, Vol.98 (7), p.205-217
Hauptverfasser: Mitard, Jerome, Kljucar, Luka, Rassoul, Nouredine, Dekkers, Harold F. W., van Setten, Michiel, Chasin, Adrian, Pourtois, Geoffrey, Belmonte, Attilio, Delhougne, Romain, Donadio, Gabriele Luca, Goux, Ludovic, Nag, Manoj, Wilson, Chris, Tokei, Zsolt, Borniquel, Jose Ignacio del agua, Steudel, Soeren, Kar, Gouri Sankar
Format: Artikel
Sprache:eng
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Zusammenfassung:Back and double gate IGZO nFETs have been demonstrated down to 120nm and 70nm respectively leveraging 300mm fab processing. While the passivation of oxygen vacancies in IGZO is challenging with an integration of front side gate, a scaled back gated flow has been optimized by multiplying design of experiments around contacts and material engineering. We then successfully demonstrated sub-40mV σ(VTH_ON) in scaled IGZO nFETs. Regarding the performance and the VTH_ON control, a new IGZO phase is also reported. A model of dopants location is proposed to better explain the experimental results reported in literature.
ISSN:1938-5862
1938-6737
DOI:10.1149/09807.0205ecst