Fractional-N PLL with multi-element fractional divider for noise reduction

Fractional-N PLL with multi-element fractional divider for noise reduction

A novel technique to suppress quantisation noise in a ΔΣ fractional-N phase-locked loop (PLL) using a fine-resolution multi-element fractional divider is presented. The proposed technique suppresses noise uniformly over the entire frequency range. It is mostly digital and is applicable for both anal...

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Veröffentlicht in:Electronics letters 2016-05, Vol.52 (10), p.809-810
Hauptverfasser: Sanyal, Arindam, Yu, Xueyi, Zhang, Yanlong, Sun, Nan
Format: Artikel
Sprache:eng
Schlagworte:
Analogue
analogue PLLs
Circuits and systems
Digital
digital PLLs
Dividers
dividing circuits
Electronics
fine‐resolution multielement fractional divider
fractional‐N PLL
Frequency ranges
interference suppression
Noise
Noise levels
noise reduction
Phase locked loops
quantisation noise suppression
ΔΣ fractional‐N phase‐locked loop
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Beschreibung
Zusammenfassung:A novel technique to suppress quantisation noise in a ΔΣ fractional-N phase-locked loop (PLL) using a fine-resolution multi-element fractional divider is presented. The proposed technique suppresses noise uniformly over the entire frequency range. It is mostly digital and is applicable for both analogue and digital PLLs. The proposed technique with an eight-element fractional divider can suppress the quantisation noise by 18 dB compared with a conventional fractional-N PLL.
ISSN:0013-5194
1350-911X
1350-911X
DOI:10.1049/el.2016.0680