Exploration of Scandium Doping in SbTe for Phase Change Memory Application

In this work, we fabricate and electrically demonstrate a 65-nm technology-compatible Phase change memory (PCM) pillar device using Sc-doped SbTe (ST) instead of GeSbTe (GST), for the first time fabricated on a 300-mm wafer in the 1T1R configuration. ST was chosen over GST to achieve a higher speed...

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Veröffentlicht in:IEEE transactions on electron devices 2022-11, Vol.69 (11), p.6106-6112
Hauptverfasser: Barci, Marinela, Leonelli, Daniele, Zhou, Xue, Wang, Xiaojie, Garbin, Daniele, Jayakumar, Ganesh, Witters, Thomas, Vergel, Nathali Franchina, Kundu, Shreya, Palayam, Senthil Vadakupudhu, Jiao, Huifang, Wu, Hao, Kar, Gouri Sankar
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Sprache:eng
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Zusammenfassung:In this work, we fabricate and electrically demonstrate a 65-nm technology-compatible Phase change memory (PCM) pillar device using Sc-doped SbTe (ST) instead of GeSbTe (GST), for the first time fabricated on a 300-mm wafer in the 1T1R configuration. ST was chosen over GST to achieve a higher speed and endurance due to its faster crystallization speed and reduced volume variation during switching. Detailed knobs on how to improve stack in terms of CD, thickness (of electrode and chalcogenide material), and Sc doping are presented. The optimized stack shows ac switching from 300 ns to 1~\mu \text{s} for SET and RESET with current in the order of milliamperes and programming voltage less than 2.5 V. The endurance shows marginal memory window degradation up to 1E8 cycles and more than 1-h retention at 85° is achieved for the optimized stack of C:Si/50-nm ST:Sc 6%. The fabricated devices show the potential to extend the PCM technology toward high-speed storage class memory (SCM) applications.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2022.3209639