Demonstration of Reconfigurable FET and Logic Gates on Epitaxial Lateral Overgrowth Silicon Platform
We developed a novel technique, selective epitaxial lateral overgrowth (ELO), to fabricate a local but sufficiently large silicon-on-insulator (SOI) platform on conventional silicon wafers. Based on high-level crystallinity of the local SOI, we implemented reconfigurable FETs with three gates. These...
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Veröffentlicht in: | IEEE transactions on electron devices 2022-10, Vol.69 (10), p.1-7 |
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creator | Lee, Seong Hyun Kim, Sang Hoon Jung, Sungyeop Park, Jeong Woo Roh, Tae Moon Lee, Wangjoo Suh, Dongwoo |
description | We developed a novel technique, selective epitaxial lateral overgrowth (ELO), to fabricate a local but sufficiently large silicon-on-insulator (SOI) platform on conventional silicon wafers. Based on high-level crystallinity of the local SOI, we implemented reconfigurable FETs with three gates. These FETs demonstrate n-and p-type behavior depending on the applied bias. Not only the reconfigurable FETs but also their logic gates (inverter and NAND) delivered sound performance. Using a compact model based on the surface potential of the channel, we derived the key parameters of the proposed reconfigurable FET and used the model to explain the peculiarities in its working behavior. Owing to the unique advantages of a local SOI, reconfigurable FETs can be seamlessly incorporated into a silicon platform as a building block for CMOS-SOI hybrid electronics. |
doi_str_mv | 10.1109/TED.2022.3200638 |
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Based on high-level crystallinity of the local SOI, we implemented reconfigurable FETs with three gates. These FETs demonstrate n-and p-type behavior depending on the applied bias. Not only the reconfigurable FETs but also their logic gates (inverter and NAND) delivered sound performance. Using a compact model based on the surface potential of the channel, we derived the key parameters of the proposed reconfigurable FET and used the model to explain the peculiarities in its working behavior. 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(IEEE) 2022</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c291t-a368ed5fdf635db1376e6b16f3528aebb00a19357705ac47b2c2c9df06cf74893</citedby><cites>FETCH-LOGICAL-c291t-a368ed5fdf635db1376e6b16f3528aebb00a19357705ac47b2c2c9df06cf74893</cites><orcidid>0000-0003-0240-5979 ; 0000-0003-4096-3242 ; 0000-0003-2669-1797</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/9874806$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>314,776,780,792,27901,27902,54733</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/9874806$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Lee, Seong Hyun</creatorcontrib><creatorcontrib>Kim, Sang Hoon</creatorcontrib><creatorcontrib>Jung, Sungyeop</creatorcontrib><creatorcontrib>Park, Jeong Woo</creatorcontrib><creatorcontrib>Roh, Tae Moon</creatorcontrib><creatorcontrib>Lee, Wangjoo</creatorcontrib><creatorcontrib>Suh, Dongwoo</creatorcontrib><title>Demonstration of Reconfigurable FET and Logic Gates on Epitaxial Lateral Overgrowth Silicon Platform</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description>We developed a novel technique, selective epitaxial lateral overgrowth (ELO), to fabricate a local but sufficiently large silicon-on-insulator (SOI) platform on conventional silicon wafers. Based on high-level crystallinity of the local SOI, we implemented reconfigurable FETs with three gates. These FETs demonstrate n-and p-type behavior depending on the applied bias. Not only the reconfigurable FETs but also their logic gates (inverter and NAND) delivered sound performance. Using a compact model based on the surface potential of the channel, we derived the key parameters of the proposed reconfigurable FET and used the model to explain the peculiarities in its working behavior. Owing to the unique advantages of a local SOI, reconfigurable FETs can be seamlessly incorporated into a silicon platform as a building block for CMOS-SOI hybrid electronics.</description><subject>CMOS</subject><subject>Epitaxial growth</subject><subject>epitaxial lateral overgrowth (ELO)</subject><subject>Field effect transistors</subject><subject>Logic circuits</subject><subject>Logic gates</subject><subject>reconfigurable FET</subject><subject>Reconfiguration</subject><subject>Semiconductor device modeling</subject><subject>Silicon</subject><subject>Silicon-on-insulator</subject><subject>silicon-on-insulator (SOI)</subject><subject>SOI (semiconductors)</subject><subject>Tunneling</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2022</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kEtLAzEUhYMoWKt7wU3A9dQ8JslkKbVWYaCidR0yM0lNmU5qkvr496a0uLrce79zDhwArjGaYIzk3XL2MCGIkAklCHFanYARZkwUkpf8FIwQwlUhaUXPwUWM67zysiQj0D2YjR9iCjo5P0Bv4atp_WDdahd00xv4OFtCPXSw9ivXwrlOJsIMzrYu6R-ne1jnU8hz8WXCKvjv9AHfXO-yCXzpdbI-bC7BmdV9NFfHOQbv2Xb6VNSL-fP0vi5aInEqNOWV6ZjtLKesazAV3PAGc0sZqbRpGoQ0lpQJgZhuS9GQlrSys4i3VpSVpGNwe_DdBv-5MzGptd-FIUcqIrDATFYcZwodqDb4GIOxahvcRodfhZHad6lyl2rfpTp2mSU3B4kzxvzjssqp-f8HFEVwGg</recordid><startdate>20221001</startdate><enddate>20221001</enddate><creator>Lee, Seong Hyun</creator><creator>Kim, Sang Hoon</creator><creator>Jung, Sungyeop</creator><creator>Park, Jeong Woo</creator><creator>Roh, Tae Moon</creator><creator>Lee, Wangjoo</creator><creator>Suh, Dongwoo</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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subjects | CMOS Epitaxial growth epitaxial lateral overgrowth (ELO) Field effect transistors Logic circuits Logic gates reconfigurable FET Reconfiguration Semiconductor device modeling Silicon Silicon-on-insulator silicon-on-insulator (SOI) SOI (semiconductors) Tunneling |
title | Demonstration of Reconfigurable FET and Logic Gates on Epitaxial Lateral Overgrowth Silicon Platform |
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