Demonstration of Reconfigurable FET and Logic Gates on Epitaxial Lateral Overgrowth Silicon Platform

We developed a novel technique, selective epitaxial lateral overgrowth (ELO), to fabricate a local but sufficiently large silicon-on-insulator (SOI) platform on conventional silicon wafers. Based on high-level crystallinity of the local SOI, we implemented reconfigurable FETs with three gates. These...

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Veröffentlicht in:IEEE transactions on electron devices 2022-10, Vol.69 (10), p.1-7
Hauptverfasser: Lee, Seong Hyun, Kim, Sang Hoon, Jung, Sungyeop, Park, Jeong Woo, Roh, Tae Moon, Lee, Wangjoo, Suh, Dongwoo
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container_end_page 7
container_issue 10
container_start_page 1
container_title IEEE transactions on electron devices
container_volume 69
creator Lee, Seong Hyun
Kim, Sang Hoon
Jung, Sungyeop
Park, Jeong Woo
Roh, Tae Moon
Lee, Wangjoo
Suh, Dongwoo
description We developed a novel technique, selective epitaxial lateral overgrowth (ELO), to fabricate a local but sufficiently large silicon-on-insulator (SOI) platform on conventional silicon wafers. Based on high-level crystallinity of the local SOI, we implemented reconfigurable FETs with three gates. These FETs demonstrate n-and p-type behavior depending on the applied bias. Not only the reconfigurable FETs but also their logic gates (inverter and NAND) delivered sound performance. Using a compact model based on the surface potential of the channel, we derived the key parameters of the proposed reconfigurable FET and used the model to explain the peculiarities in its working behavior. Owing to the unique advantages of a local SOI, reconfigurable FETs can be seamlessly incorporated into a silicon platform as a building block for CMOS-SOI hybrid electronics.
doi_str_mv 10.1109/TED.2022.3200638
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subjects CMOS
Epitaxial growth
epitaxial lateral overgrowth (ELO)
Field effect transistors
Logic circuits
Logic gates
reconfigurable FET
Reconfiguration
Semiconductor device modeling
Silicon
Silicon-on-insulator
silicon-on-insulator (SOI)
SOI (semiconductors)
Tunneling
title Demonstration of Reconfigurable FET and Logic Gates on Epitaxial Lateral Overgrowth Silicon Platform
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