Demonstration of Reconfigurable FET and Logic Gates on Epitaxial Lateral Overgrowth Silicon Platform

We developed a novel technique, selective epitaxial lateral overgrowth (ELO), to fabricate a local but sufficiently large silicon-on-insulator (SOI) platform on conventional silicon wafers. Based on high-level crystallinity of the local SOI, we implemented reconfigurable FETs with three gates. These FETs demonstrate n-and p-type behavior depending on the applied bias. Not only the reconfigurable FETs but also their logic gates (inverter and NAND) delivered sound performance. Using a compact model based on the surface potential of the channel, we derived the key parameters of the proposed reconfigurable FET and used the model to explain the peculiarities in its working behavior. Owing to the unique advantages of a local SOI, reconfigurable FETs can be seamlessly incorporated into a silicon platform as a building block for CMOS-SOI hybrid electronics.