A programmable Reed-Solomon codec processor

A programmable Reed-Solomon codec processor

We propose a Reed-Solomon (RS) codec processor that can have programmable error-correction number of 1 to 10, and codeword length of 8 to 255. The proposed RS codec processor includes an encoder and a decoder. Especially in the decoder, we use a modified Fermat algorithm to reduce the complexity of...

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Bibliographische Detailangaben
Hauptverfasser: Zheng Xiong Chen, Nan-Ying Shen, Chen, O.T.-C., Yuh-Feng Hsu, Yuh-Jou Tsen, Perng, D.Y.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
CMOS process
CMOS technology
Codecs
Decoding
Error correction
Error correction codes
Libraries
Reed-Solomon codes
Signal processing
Throughput
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Beschreibung
Zusammenfassung:We propose a Reed-Solomon (RS) codec processor that can have programmable error-correction number of 1 to 10, and codeword length of 8 to 255. The proposed RS codec processor includes an encoder and a decoder. Especially in the decoder, we use a modified Fermat algorithm to reduce the complexity of the division. By using the cell library of the TSMC 0.35 /spl mu/m CMOS technology, the proposed RS codec processor was implemented with a die size of 5.1/spl times/5.0 mm/sup 2/. It can operate at 50 MHz to yield the throughput rate of 50 Msamples per second where each sample is 8 bits.
DOI:10.1109/MWSCAS.2001.986187