Design trends and challenges for parallel optical interconnect

Design trends and challenges for parallel optical interconnect

A 12-channel 3.125 Gb/s VCSEL driver IC has been designed in a SiGe BiCMOS process technology. The IC consists of 12 VCSEL drivers, a set of DACs providing per-channel adjustment of modulation and bias currents, peaking depth and width, and overcurrent threshold, and a three-wire serial interface wh...

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Bibliographische Detailangaben
Hauptverfasser: Armstrong, A., Killmeyerz, S., Yee, J., Uscategui, G., Deming, R., Taewon Jung, Heilman, R., Patterson, H., Yoonhyuk Ro, Myers, D., Mack, L., Xiaofang Mug
Format: Tagungsbericht
Sprache:eng
Schlagworte:
BiCMOS integrated circuits
Germanium silicon alloys
Manufacturing
Optical design
Optical interconnections
Optical modulation
Photonic integrated circuits
Safety
Silicon germanium
Vertical cavity surface emitting lasers
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Beschreibung
Zusammenfassung:A 12-channel 3.125 Gb/s VCSEL driver IC has been designed in a SiGe BiCMOS process technology. The IC consists of 12 VCSEL drivers, a set of DACs providing per-channel adjustment of modulation and bias currents, peaking depth and width, and overcurrent threshold, and a three-wire serial interface which allows access to the DACs as well as internal registers for eye safety shutdown and other functions. The driver IC addresses many of the manufacturing issues in very short reach (VSR) parallel optical modules.
ISSN:1092-8081
2766-1733
DOI:10.1109/LEOS.2001.969164