Dynamic modeling of inter-instruction effects for execution time estimation

The market for embedded applications is facing a growing interest in power consumption issues: this work is intended to provide a new model to estimate software-level power consumption of 32-bit microprocessors. This model extends previous ones by considering dynamic inter-instruction effects that t...

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Hauptverfasser:	Beltrame, G., Brandolese, C., Fornaciari, W., Salice, F., Sciuto, D., Trianni, V.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Application software Computer architecture Computer systems organization > Architectures Computer systems organization > Architectures > Parallel architectures > Very long instruction word Computer systems organization > Architectures > Serial architectures > Complex instruction set computing Computer systems organization > Architectures > Serial architectures > Reduced instruction set computing Computer systems organization > Embedded and cyber-physical systems Computer systems organization > Real-time systems Electronic design automation and methodology Embedded system Energy consumption Hardware Microprocessors Permission Pipelines Power system modeling
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Beschreibung
Zusammenfassung:	The market for embedded applications is facing a growing interest in power consumption issues: this work is intended to provide a new model to estimate software-level power consumption of 32-bit microprocessors. This model extends previous ones by considering dynamic inter-instruction effects that take place during code execution, providing a static means to characterize their energy consumption. The model is formally sound: it is conceived for a generic architecture and it has been preliminary validated on the Intel486 architectur.
ISSN:	1080-1820
DOI:	10.1145/500001.500033