A 0.35 /spl mu/m SiGe BiCMOS front end for GSM low IF cellular receiver applications

This work presents the design and simulation of a cellular receiver front end for GSM applications implemented in 0.35 SiGe BiCMOS technology. The low noise amplifier is designed using bipolar transistors, and achieves a voltage gain of 17 dB at 950 MHz, while its noise figure is suppressed to 1.9 dB in the same frequency region. The resulting 1 dB compression point is -12 dBm and the IIP3 is -3 dBm. The mixer is a double balanced Gilbert cell performing an IIP3 of 14 dBm, while the single sideband noise figure is around 12 dB. The whole structure is oriented to low IF receiver applications while the overall power consumption is 31 mW provided from a 3.3 V power supply.