A C compiler design concept used for MAS family of digital signal processors
This paper addresses the problem of compiler design for digital signal processors (DSPs). It describes C compiler designed for the Micronas Semiconductor MAS family of DSPs, that are primarily designed for real-time audio and speech applications. During the development of this compiler, several prob...
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| creator | Popovic, M. Jovanovic, Z. Pap, I. Medic, V. Culibrk, D. |
| description | This paper addresses the problem of compiler design for digital signal processors (DSPs). It describes C compiler designed for the Micronas Semiconductor MAS family of DSPs, that are primarily designed for real-time audio and speech applications. During the development of this compiler, several problems related to the highly asymmetric architecture were faced. We describe the support for different memory word-accumulator lengths, the use of instructions with memory operands, MAC instructions, the use of the auto increment/decrement feature of address generators and hardware loops. Also we present ways to improve resource allocation, context saving and synchronizing code. The effects of such procedures have been illustrated, using DSPStone tests. |
| doi_str_mv | 10.1109/TELSKS.2001.955849 |
| format | Conference Proceeding |
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| language | eng |
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| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Application software Digital signal processing Digital signal processors Hardware Programming profession Registers Resource management Signal design Speech Testing |
| title | A C compiler design concept used for MAS family of digital signal processors |
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