Design of CMOS composite transistors with improved operating region

Design of CMOS composite transistors with improved operating region

Proposes two new CMOS composite transistors with an improved operating region by reducing a threshold voltage. The proposed composite transistors 1 and 2 employ a p-type folded composite transistor and an electronic Zener diode in order to decrease the threshold voltage, respectively. The simulation...

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Bibliographische Detailangaben
Hauptverfasser: Young-Gyu Yu, Seok-Woo Choi, Dong-Yong Kim, Kyu-Tae Park, Hong-Jo Ahn
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Analog circuits
Breakdown voltage
Circuit simulation
Circuits and systems
Diodes
Low voltage
MOS devices
Signal processing
Threshold voltage
Transconductance
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Beschreibung
Zusammenfassung:Proposes two new CMOS composite transistors with an improved operating region by reducing a threshold voltage. The proposed composite transistors 1 and 2 employ a p-type folded composite transistor and an electronic Zener diode in order to decrease the threshold voltage, respectively. The simulation has been carried out using 0.25/spl mu/m n-well process with 2.5V supply voltage.
DOI:10.1109/MWSCAS.2000.951393