A Fast Droop-Recovery Event-Driven Digital LDO With Adaptive Linear/Binary Two-Step Search for Voltage Regulation in Advanced Memory

This letter presents an event-driven digital low-dropout regulator (DLDO) with an adaptive linear/binary two-step search achieving a fast transient response. A two-dimensional (2-D) circular shifting register (CSR) offers an adaptive linear-search regulation. When a large voltage droop occurs, the CSR activates a fast-tracking mode that provides immediate recovery from the droop. Once the linear search by the CSR is completed, a subrange successive-approximation register (Sub-SAR) conducts the binary-search regulation. The full-scale current range of the Sub-SAR is adaptively scaled by referencing the CSR, which reduces the number of searching steps and improves undershoot or overshoot caused by the binary-search operation. Ring amplifier based 1.5b continuous-time (CT) comparators and the asynchronous controllers realize the event-driven operation that breaks a tradeoff between transient response and sampling clock frequency. The proposed DLDO was fabricated in a 40 nm CMOS process. The DLDO can operate in an input voltage V IN range from 0.6 to 1.2 V. When a load current step of 104.2 mA/1 ns was applied at a V IN of 1.0 V, a droop-recovery time and a settling time were measured as 6 and 15 ns, respectively.