Fast LDPC GPU Decoder for Cloud RAN

The graphical processing unit (GPU), as a digital signal processing accelerator for cloud RAN, is investigated. This letter presents a new design for a 5G NR low-density parity check code decoder running on a GPU. The algorithm is flexibly adaptable to GPU architecture to achieve high resource utili...

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Veröffentlicht in:IEEE embedded systems letters 2021-12, Vol.13 (4), p.170-173
Hauptverfasser: Ling, Jonathan, Cautereels, Paul
Format: Artikel
Sprache:eng
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Zusammenfassung:The graphical processing unit (GPU), as a digital signal processing accelerator for cloud RAN, is investigated. This letter presents a new design for a 5G NR low-density parity check code decoder running on a GPU. The algorithm is flexibly adaptable to GPU architecture to achieve high resource utilization as well as low latency. It improves on the layered algorithm by increasing parallelism on a single code word. The flexible GPU decoder (on a 24 core GPU) was found to have 5\times higher throughput compared to a recent GPU flooding decoder and 3\times higher throughput compared to a field programmable gate array (FPGA) decoder (757K gate). The flexible GPU decoder exhibits 1/3 decoding power efficiency of the FPGA typical of general-purpose processors. For rapid deployment and flexibility, GPUs may be suitable as cloud RAN accelerators.
ISSN:1943-0663
1943-0671
DOI:10.1109/LES.2021.3052714