Guaranteeing quality throughout the product life cycle: on-line test and repair to the rescue
Summary form only given, as follows. The panel will address the following issues: (1) Many of the defect behaviors in very-deep-sub-micron technologies are complex functions of voltage, temperature and input signals. Many of these defects may be just flaws that can cause earlylife failures. Detectin...
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Zusammenfassung: | Summary form only given, as follows. The panel will address the following issues: (1) Many of the defect behaviors in very-deep-sub-micron technologies are complex functions of voltage, temperature and input signals. Many of these defects may be just flaws that can cause earlylife failures. Detecting all these defects during production may increase the test cost in terms of resources (e.g., low temperature, voltage or temperature burn-in) or test time. Should we test for these defects during production? Should we rely on on-line test to detect these defects if they cause failures in the field?; after detection, we have to rely on on-line repair. (2) In a recent paper in the SRC Topical Research Conference on Reliability the author observed that if infant mortality defects can be repaired "in use" using fault-tolerance techniques (in caches for example), and parts of the die can therefore be turned off during burn-in, then the burn-in power requirements can be greatly reduced. If we have on-line test and repair capabilities for logic, can we avoid burn-in? What are the trade-offs? (3) In nanometer technologies, transients are going to be a big problem. EE Times (June 1999) reported that "soft-errors" from various sources (e.g., noise, coupling, radiation from packaging) are going to be a problem. Should we test for these problems? It may not even be possible to detect all these errors during production test. (4) Some of the current (and future) generations of IC chips are pin-limited - hence, there is a possibility that we will have silicon area available for implementing on-line test structures inside the chip. The associated problems are lack of automation tools, increased design effort and possible yield degradation. (5) On-line test can be helpful for system test and system-diagnostics - for example, it may be easier to identify which chip in the system is faulty so that the faulty chip or the board can be replaced. If we have on-line repair capabilities, system availability can increase significantly. (6) Defect-tolerance is an accepted practice for memories. Is it time to investigate defect tolerance for logic? |
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DOI: | 10.1109/VTS.2001.923432 |