The effects of plasma-induced damage on transistor degradation and the relationship to field programmable gate array performance
The impact of plasma-induced damage on the speed performance of a field programmable gate array (FPGA) is presented. It was found that FPGA speed degradation induced by product reliability burn-in was directly related to a large negative threshold voltage (V/sub t/) shift of the surface channel PMOS...
Gespeichert in:
| Hauptverfasser: | , , , , , , , , |
|---|---|
| Format: | Tagungsbericht |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | 318 |
|---|---|
| container_issue | |
| container_start_page | 315 |
| container_title | |
| container_volume | |
| creator | Pagaduan, F.E. Lee, J.K.J. Vedagarbha, V. Lui, K. Hart, M.J. Gitlin, D. Takaso, T. Kamiyama, S. Nakayama, K. |
| description | The impact of plasma-induced damage on the speed performance of a field programmable gate array (FPGA) is presented. It was found that FPGA speed degradation induced by product reliability burn-in was directly related to a large negative threshold voltage (V/sub t/) shift of the surface channel PMOS induced by negative bias temperature (BT) stress. Such negative bias temperature instability (NBTI) in the PMOS was shown to be related to specific back-end plasma processing steps. An overall reduction in NBTI of the PMOSFET was observed when certain plasma processing steps were eliminated which in turn resulted in the reduction of FPGA performance degradation. |
| doi_str_mv | 10.1109/RELPHY.2001.922921 |
| format | Conference Proceeding |
| fullrecord | <record><control><sourceid>ieee_6IE</sourceid><recordid>TN_cdi_ieee_primary_922921</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><ieee_id>922921</ieee_id><sourcerecordid>922921</sourcerecordid><originalsourceid>FETCH-LOGICAL-i242t-be903d756d23106fd5d05125b8a6001266c5f532bd42b94f2d0c752e4290aa3d3</originalsourceid><addsrcrecordid>eNotkM1KAzEUhQMiqLUv0FVeYGp-JplmKaVaoaBIXbgqd-betJH5I4mL7nx0B-vZHDgcPjiHsYUUSymFe3jf7N62n0slhFw6pZySV-xOVCuhrVlV7obNU_oSk0pTaitu2c_-RJy8pyYnPng-tpA6KEKP3w0hR-jgSHzoeY7Qp5DyEDnSMQJCDlMMPfI8ISK1f0E6hZHngftALfIxDlO166BuiR8hE4cY4cxHin6IHfQN3bNrD22i-b_P2MfTZr_eFrvX55f1464IqlS5qMkJjZWxqLQU1qNBYaQy9QrsNFZZ2xhvtKqxVLUrvULRVEZRqZwA0KhnbHHhBiI6jDF0EM-Hy0f6F4G5X4c</addsrcrecordid><sourcetype>Publisher</sourcetype><iscdi>true</iscdi><recordtype>conference_proceeding</recordtype></control><display><type>conference_proceeding</type><title>The effects of plasma-induced damage on transistor degradation and the relationship to field programmable gate array performance</title><source>IEEE Electronic Library (IEL) Conference Proceedings</source><creator>Pagaduan, F.E. ; Lee, J.K.J. ; Vedagarbha, V. ; Lui, K. ; Hart, M.J. ; Gitlin, D. ; Takaso, T. ; Kamiyama, S. ; Nakayama, K.</creator><creatorcontrib>Pagaduan, F.E. ; Lee, J.K.J. ; Vedagarbha, V. ; Lui, K. ; Hart, M.J. ; Gitlin, D. ; Takaso, T. ; Kamiyama, S. ; Nakayama, K.</creatorcontrib><description>The impact of plasma-induced damage on the speed performance of a field programmable gate array (FPGA) is presented. It was found that FPGA speed degradation induced by product reliability burn-in was directly related to a large negative threshold voltage (V/sub t/) shift of the surface channel PMOS induced by negative bias temperature (BT) stress. Such negative bias temperature instability (NBTI) in the PMOS was shown to be related to specific back-end plasma processing steps. An overall reduction in NBTI of the PMOSFET was observed when certain plasma processing steps were eliminated which in turn resulted in the reduction of FPGA performance degradation.</description><identifier>ISBN: 0780365879</identifier><identifier>ISBN: 9780780365872</identifier><identifier>DOI: 10.1109/RELPHY.2001.922921</identifier><language>eng</language><publisher>IEEE</publisher><subject>Degradation ; Field programmable gate arrays ; MOSFET circuits ; Negative bias temperature instability ; Niobium compounds ; Plasma materials processing ; Plasma temperature ; Stress ; Threshold voltage ; Titanium compounds</subject><ispartof>2001 IEEE International Reliability Physics Symposium Proceedings. 39th Annual (Cat. No.00CH37167), 2001, p.315-318</ispartof><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/922921$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>309,310,776,780,785,786,2052,4036,4037,27902,54895</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/922921$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc></links><search><creatorcontrib>Pagaduan, F.E.</creatorcontrib><creatorcontrib>Lee, J.K.J.</creatorcontrib><creatorcontrib>Vedagarbha, V.</creatorcontrib><creatorcontrib>Lui, K.</creatorcontrib><creatorcontrib>Hart, M.J.</creatorcontrib><creatorcontrib>Gitlin, D.</creatorcontrib><creatorcontrib>Takaso, T.</creatorcontrib><creatorcontrib>Kamiyama, S.</creatorcontrib><creatorcontrib>Nakayama, K.</creatorcontrib><title>The effects of plasma-induced damage on transistor degradation and the relationship to field programmable gate array performance</title><title>2001 IEEE International Reliability Physics Symposium Proceedings. 39th Annual (Cat. No.00CH37167)</title><addtitle>RELPHY</addtitle><description>The impact of plasma-induced damage on the speed performance of a field programmable gate array (FPGA) is presented. It was found that FPGA speed degradation induced by product reliability burn-in was directly related to a large negative threshold voltage (V/sub t/) shift of the surface channel PMOS induced by negative bias temperature (BT) stress. Such negative bias temperature instability (NBTI) in the PMOS was shown to be related to specific back-end plasma processing steps. An overall reduction in NBTI of the PMOSFET was observed when certain plasma processing steps were eliminated which in turn resulted in the reduction of FPGA performance degradation.</description><subject>Degradation</subject><subject>Field programmable gate arrays</subject><subject>MOSFET circuits</subject><subject>Negative bias temperature instability</subject><subject>Niobium compounds</subject><subject>Plasma materials processing</subject><subject>Plasma temperature</subject><subject>Stress</subject><subject>Threshold voltage</subject><subject>Titanium compounds</subject><isbn>0780365879</isbn><isbn>9780780365872</isbn><fulltext>true</fulltext><rsrctype>conference_proceeding</rsrctype><creationdate>2001</creationdate><recordtype>conference_proceeding</recordtype><sourceid>6IE</sourceid><sourceid>RIE</sourceid><recordid>eNotkM1KAzEUhQMiqLUv0FVeYGp-JplmKaVaoaBIXbgqd-betJH5I4mL7nx0B-vZHDgcPjiHsYUUSymFe3jf7N62n0slhFw6pZySV-xOVCuhrVlV7obNU_oSk0pTaitu2c_-RJy8pyYnPng-tpA6KEKP3w0hR-jgSHzoeY7Qp5DyEDnSMQJCDlMMPfI8ISK1f0E6hZHngftALfIxDlO166BuiR8hE4cY4cxHin6IHfQN3bNrD22i-b_P2MfTZr_eFrvX55f1464IqlS5qMkJjZWxqLQU1qNBYaQy9QrsNFZZ2xhvtKqxVLUrvULRVEZRqZwA0KhnbHHhBiI6jDF0EM-Hy0f6F4G5X4c</recordid><startdate>2001</startdate><enddate>2001</enddate><creator>Pagaduan, F.E.</creator><creator>Lee, J.K.J.</creator><creator>Vedagarbha, V.</creator><creator>Lui, K.</creator><creator>Hart, M.J.</creator><creator>Gitlin, D.</creator><creator>Takaso, T.</creator><creator>Kamiyama, S.</creator><creator>Nakayama, K.</creator><general>IEEE</general><scope>6IE</scope><scope>6IH</scope><scope>CBEJK</scope><scope>RIE</scope><scope>RIO</scope></search><sort><creationdate>2001</creationdate><title>The effects of plasma-induced damage on transistor degradation and the relationship to field programmable gate array performance</title><author>Pagaduan, F.E. ; Lee, J.K.J. ; Vedagarbha, V. ; Lui, K. ; Hart, M.J. ; Gitlin, D. ; Takaso, T. ; Kamiyama, S. ; Nakayama, K.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-i242t-be903d756d23106fd5d05125b8a6001266c5f532bd42b94f2d0c752e4290aa3d3</frbrgroupid><rsrctype>conference_proceedings</rsrctype><prefilter>conference_proceedings</prefilter><language>eng</language><creationdate>2001</creationdate><topic>Degradation</topic><topic>Field programmable gate arrays</topic><topic>MOSFET circuits</topic><topic>Negative bias temperature instability</topic><topic>Niobium compounds</topic><topic>Plasma materials processing</topic><topic>Plasma temperature</topic><topic>Stress</topic><topic>Threshold voltage</topic><topic>Titanium compounds</topic><toplevel>online_resources</toplevel><creatorcontrib>Pagaduan, F.E.</creatorcontrib><creatorcontrib>Lee, J.K.J.</creatorcontrib><creatorcontrib>Vedagarbha, V.</creatorcontrib><creatorcontrib>Lui, K.</creatorcontrib><creatorcontrib>Hart, M.J.</creatorcontrib><creatorcontrib>Gitlin, D.</creatorcontrib><creatorcontrib>Takaso, T.</creatorcontrib><creatorcontrib>Kamiyama, S.</creatorcontrib><creatorcontrib>Nakayama, K.</creatorcontrib><collection>IEEE Electronic Library (IEL) Conference Proceedings</collection><collection>IEEE Proceedings Order Plan (POP) 1998-present by volume</collection><collection>IEEE Xplore All Conference Proceedings</collection><collection>IEEE Electronic Library (IEL)</collection><collection>IEEE Proceedings Order Plans (POP) 1998-present</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Pagaduan, F.E.</au><au>Lee, J.K.J.</au><au>Vedagarbha, V.</au><au>Lui, K.</au><au>Hart, M.J.</au><au>Gitlin, D.</au><au>Takaso, T.</au><au>Kamiyama, S.</au><au>Nakayama, K.</au><format>book</format><genre>proceeding</genre><ristype>CONF</ristype><atitle>The effects of plasma-induced damage on transistor degradation and the relationship to field programmable gate array performance</atitle><btitle>2001 IEEE International Reliability Physics Symposium Proceedings. 39th Annual (Cat. No.00CH37167)</btitle><stitle>RELPHY</stitle><date>2001</date><risdate>2001</risdate><spage>315</spage><epage>318</epage><pages>315-318</pages><isbn>0780365879</isbn><isbn>9780780365872</isbn><abstract>The impact of plasma-induced damage on the speed performance of a field programmable gate array (FPGA) is presented. It was found that FPGA speed degradation induced by product reliability burn-in was directly related to a large negative threshold voltage (V/sub t/) shift of the surface channel PMOS induced by negative bias temperature (BT) stress. Such negative bias temperature instability (NBTI) in the PMOS was shown to be related to specific back-end plasma processing steps. An overall reduction in NBTI of the PMOSFET was observed when certain plasma processing steps were eliminated which in turn resulted in the reduction of FPGA performance degradation.</abstract><pub>IEEE</pub><doi>10.1109/RELPHY.2001.922921</doi><tpages>4</tpages></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | ISBN: 0780365879 |
| ispartof | 2001 IEEE International Reliability Physics Symposium Proceedings. 39th Annual (Cat. No.00CH37167), 2001, p.315-318 |
| issn | |
| language | eng |
| recordid | cdi_ieee_primary_922921 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Degradation Field programmable gate arrays MOSFET circuits Negative bias temperature instability Niobium compounds Plasma materials processing Plasma temperature Stress Threshold voltage Titanium compounds |
| title | The effects of plasma-induced damage on transistor degradation and the relationship to field programmable gate array performance |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-09T14%3A55%3A06IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-ieee_6IE&rft_val_fmt=info:ofi/fmt:kev:mtx:book&rft.genre=proceeding&rft.atitle=The%20effects%20of%20plasma-induced%20damage%20on%20transistor%20degradation%20and%20the%20relationship%20to%20field%20programmable%20gate%20array%20performance&rft.btitle=2001%20IEEE%20International%20Reliability%20Physics%20Symposium%20Proceedings.%2039th%20Annual%20(Cat.%20No.00CH37167)&rft.au=Pagaduan,%20F.E.&rft.date=2001&rft.spage=315&rft.epage=318&rft.pages=315-318&rft.isbn=0780365879&rft.isbn_list=9780780365872&rft_id=info:doi/10.1109/RELPHY.2001.922921&rft_dat=%3Cieee_6IE%3E922921%3C/ieee_6IE%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rft_ieee_id=922921&rfr_iscdi=true |