Emulating Round-to-Nearest Ties-to-Zero "Augmented" Floating-Point Operations Using Round-to-Nearest Ties-to-Even Arithmetic

Emulating Round-to-Nearest Ties-to-Zero "Augmented" Floating-Point Operations Using Round-to-Nearest Ties-to-Even Arithmetic

The 2019 version of the IEEE 754 Standard for Floating-Point Arithmetic recommends that new "augmented" operations should be provided for the binary formats. These operations use a new "rounding direction": round-to-nearest ties-to-zero . We show how they can be implemented using...

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Veröffentlicht in:IEEE transactions on computers 2021-07, Vol.70 (7), p.1046-1058
Hauptverfasser: Boldo, Sylvie, Lauter, Christoph, Muller, Jean-Michel
Format: Artikel
Sprache:eng
Schlagworte:
Computer Arithmetic
Computer Science
Error analysis
error-free transforms
Floating point arithmetic
formal proof
Hardware
numerical reproducibility
Other
Reproducibility
Rounding
rounding error analysis
rounding mode
Transforms
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Zusammenfassung:The 2019 version of the IEEE 754 Standard for Floating-Point Arithmetic recommends that new "augmented" operations should be provided for the binary formats. These operations use a new "rounding direction": round-to-nearest ties-to-zero . We show how they can be implemented using the currently available operations, using round-to-nearest ties-to-even with a partial formal proof of correctness.
ISSN:0018-9340
1557-9956
DOI:10.1109/TC.2020.3002702