Trivial Bypassing in GPGPUs

This letter presents trivial bypassing to detect and skip execution of trivial instructions in general-purpose graphics processing units (GPGPUs). During the execution of a program, a significant number of instructions are trivial; that is, the instructions do not need functional units for execution. The outcome of such instructions can be determined based on source operands. Execution of these instructions unnecessarily wastes hardware resources and reduces energy efficiency of GPGPUs. We propose a microarchitectural technique that detects and bypasses trivial instructions dynamically and during the runtime. By bypassing trivial instructions, the energy of functional units is reduced. In addition to functional units, the other component that benefits from trivial bypassing is the register file. We exploit register renaming to remap destination field of trivial instructions. Using register renaming, logical registers with the same values share the same physical registers. This reduces the number of accesses to physical registers and enhances the energy efficiency of GPGPUs. Evaluations using a wide range of applications reveal that trivial bypassing reduces the energy of GPGPUs by 8% with negligible impact on performance.