Power semiconductor device modeling with Model Architect

Power semiconductor device modeling with Model Architect

A new modeling environment for the creation, testing and validation of HDL-based models is presented. The environment is designed to support the generation of multiple hardware description languages including MAST, VHDL-AMS and Verilog-AMS. The software architecture and feature set of the environmen...

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Bibliographische Detailangaben
Hauptverfasser: Mantooth, H.A., Skudlarek, J.P., Carlson, J.R., Cooper, D.K., Getreu, I.E., Graham, G., Pothier, S., Vedam, R., Wolff, C.M.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Circuit simulation
Context modeling
Graphics
Hardware design languages
Power electronics
Power engineering and energy
Power semiconductor devices
Power system modeling
Robustness
Semiconductor device testing
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Beschreibung
Zusammenfassung:A new modeling environment for the creation, testing and validation of HDL-based models is presented. The environment is designed to support the generation of multiple hardware description languages including MAST, VHDL-AMS and Verilog-AMS. The software architecture and feature set of the environment is described. The main use model is illustrated through an IGBT model creation example.
DOI:10.1109/CIPE.2000.904683