A 1.5 V high performance mixed signal integration with indium channel for 130 nm technology node

In this paper, mixed signal LSI operating at a single drain voltage of 1.5 V is shown. Integration of high performance logic MOSFET with analog MOSFET is achieved by optimizing channel structures. Very high performance and competitive drive currents of 830 /spl mu/A//spl mu/m for nMOS and 390 /spl m...

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Hauptverfasser: Morifuji, E., Oishi, A., Miyashita, K., Aota, S., Nishigori, M., Ootani, H., Nakayama, T., Miyamoto, K., Matsuoka, F., Noguchi, T., Kakumu, M.
Format: Tagungsbericht
Sprache:eng
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Zusammenfassung:In this paper, mixed signal LSI operating at a single drain voltage of 1.5 V is shown. Integration of high performance logic MOSFET with analog MOSFET is achieved by optimizing channel structures. Very high performance and competitive drive currents of 830 /spl mu/A//spl mu/m for nMOS and 390 /spl mu/A//spl mu/m for pMOS at 1 nA//spl mu/m off currents are achieved by careful halo optimization in logic MOSFET. In analog part, indium channel is applied for satisfying low threshold voltage specification which comes from dynamic range viewpoint. This indium channel MOSFET shows superior analog performance. By applying indium retrograde channel, high DC gain values which are approximately ten times lager than the uniform boron channel case are achieved in addition to wide bandwidth and good Vth matching. It is found that well anneal temperature which is carried out soon after channel ion implantation is very sensitive to analog performance in indium retrograde channel. This optimization is significant for DC gain and matching.
DOI:10.1109/IEDM.2000.904355