Dynamic CGD and dV/dt in Superjunction MOSFETs

As the dimensions of the power metal-semiconductor field-effect transistor (MOSFET) are scaling down, and the output capacitance is considerably reduced, the fast dV/dt becomes an issue and can trigger severe oscillations during hard switching. To understand the origin of the dV/dt and the induced gate oscillations, the intricate link between the device operation and the circuit conditions is required. In this article, the dynamic gate-to-drain capacitance, CGD, is extracted by employing a five-terminal method. Through the use of simulations, the relationship between CGD and the induced gate oscillations is explored. In addition to this, the 2-D depletion behavior in a superjunction system, which affects the dynamic CGD, is investigated.