Gate-Induced Drain Leakage in Negative Capacitance FinFETs

In this article, we analyze the issue of gate-induced-drain-leakage (GIDL) in metal-ferroelectric-insulator-semiconductor (MFIS)-type negative capacitance fin field-effect transistor (NC-FinFET) using 3-D technology computer-aided design (TCAD) simulations. We present a comprehensive analysis of GID...

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Veröffentlicht in:IEEE transactions on electron devices 2020-03, Vol.67 (3), p.802-809
Hauptverfasser: Gaidhane, Amol D., Pahwa, Girish, Verma, Amit, Chauhan, Yogesh Singh
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Sprache:eng
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Zusammenfassung:In this article, we analyze the issue of gate-induced-drain-leakage (GIDL) in metal-ferroelectric-insulator-semiconductor (MFIS)-type negative capacitance fin field-effect transistor (NC-FinFET) using 3-D technology computer-aided design (TCAD) simulations. We present a comprehensive analysis of GIDL characteristics on 7-nm technology node with respect to the variation of ferroelectric and silicon body thicknesses, source/drain junction placement, and source/drain doping concentration of NC-FinFET. We find that in NCFET, steeper energy band profiles near the source and drain side caused by fringing field coupling to the ferroelectric result in a prior and larger onset of the longitudinal band to band tunneling (L-BTBT) current compared to the baseline FinFET. Also, we find that, unlike the conventional FinFET, NC-FinFET shows the nonmonotonic trend in the occurrence of the L-BTBT component as we scale down the channel length of the device due to the reverse short channel effect.
ISSN:0018-9383
1557-9646
DOI:10.1109/TED.2020.2967463