Fault Detection and Protection Strategy for Islanded Inverter-Based Microgrids

This article proposes a fault detection and protection strategy for islanded inverter-based microgrids (IBMGs). Reliable and accurate protection is one of the main challenges in the proliferation of modern microgrids (MGs). Considering the limited fault current of the voltage-frequency-controlled in...

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Veröffentlicht in:IEEE journal of emerging and selected topics in power electronics 2021-02, Vol.9 (1), p.472-484
Hauptverfasser: Zarei, Seyed Fariborz, Mokhtari, Hossein, Blaabjerg, Frede
Format: Artikel
Sprache:eng
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Zusammenfassung:This article proposes a fault detection and protection strategy for islanded inverter-based microgrids (IBMGs). Reliable and accurate protection is one of the main challenges in the proliferation of modern microgrids (MGs). Considering the limited fault current of the voltage-frequency-controlled inverter-based distributed energy resources (VF-IBDERs), the protection is more challenging in islanded IBMGs. In this regard, the control scheme of VF-IBDER with a current limiting strategy plays an important role. Due to the limited fault currents close to the converter nominal current, the conventional fault detection methods do not work properly. In addition, bidirectional fault currents worsen protection coordination. In this article, first, an analytical sequence network modeling for VF-IBDERs is derived to specify their behavior under fault conditions. Then, a voltage-restrained negative-sequence resistance-based fault detection approach is proposed, which is based on the derived sequence networks. This quantity inherently detects the fault and its direction and is independent of the fault current magnitude. The proposed feature can be employed in both the conventional and communication-assisted coordination strategies. In addition, a protection coordination strategy based on a definite-time grading approach is employed. Finally, the performance of the proposed scheme is demonstrated by applying different faults in a test MG in PSCAD/EMTDC environment.
ISSN:2168-6777
2168-6785
DOI:10.1109/JESTPE.2019.2962245