All-Digital Cost-Efficient CMOS Digital-to-Time Converter Using Binary-Weighted Pulse Expansion

This brief presents a cost-efficient all-digital CMOS digital-to-time converter (DTC) that innovatively applies binary-weighted pulse expansion. The DTC consists of a pulse generator (PG) for pulse generation ( t_{p} ), a binary-weighted pulse-expanding circuit (BWPEC) as a main circuit for digital-to-time conversion, and a time subtractor (TS) for t_{p} removal. Compared with the original pulse-expanding unit (PEU), a novel PEU with reduced complexity and a linear pulse expansion was developed for binary-weighted operation. The use of the BWPEC with the binary-weighted PEUs exhibits lower circuit complexity and considerably reduces the circuit cost compared to the original unary-weighted pulse-expanding circuit (PEC). A prototype of the 4-bit all-digital DTC was fabricated using a Taiwan Semiconductor Manufacturing Company (TSMC) 0.35- \mu \text{m} CMOS process. The fabricated DTC exhibited an area of 0.02 mm 2 achieving twofold improvement considerably. The measured resolution was approximately 5 ps, with the integral nonlinearity being −1.2-1 least significant bit (LSB). Without requiring an advanced CMOS process, the pulse variation technique with a simple structure can easily achieve fine resolution. The DTC features cost-efficient pulse expansion with binary weights and low circuit complexity.