Integrated Output Matching Networks for Class-J/J−1 Power Amplifiers

In this paper, two output matching networks (OMNs) are proposed for integrated class-J and class-J −1 mode power amplifiers (PAs). The first MN provides the required load impedances of the class-J mode (i.e., Z(f_{0})=R_{\mathrm{ opt}}+jR_{\mathrm{ opt}} and Z({2}f_{0})=-j({3}\pi /{8})R_{\mathrm{ opt}} ), whereas the second MN realizes the optimal impedances of class-J −1 PAs (i.e., Z(f_{0})=R_{\mathrm{ opt}}-jR_{\mathrm{ opt}} and Z({2}f_{0})=j({3}\pi /{8})R_{\mathrm{ opt}} ). Detailed theoretical analyses are presented for each MN, and the values of matching components (i.e., inductors and capacitors) are obtained in terms of R_{\mathrm{ opt}} . Analytical derivations are verified by simulation results, while bandwidth and loss performances of each MN are also characterized. Two proof-of-concept class-J and class-J −1 PAs are designed and implemented in a 0.25- \mu \text{m} GaAs process, where the proposed OMNs are employed in the designed circuits. The manufactured PAs show ≥28 dBm output power, ≥65% drain efficiency, and ≥61% power-added efficiency at 2 GHz.