Reassessments of Minority Carrier Traps in Silicon With Photoconductance Decay Measurements
In photoconductance (PC) based carrier lifetime measurement, artificially high values at low-to-medium injection levels are often observed because of the presence of minority carrier traps in the sample. In this paper, we demonstrate that the traps in n-type Czochralski silicon are in a transient re...
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Veröffentlicht in: | IEEE journal of photovoltaics 2019-05, Vol.9 (3), p.652-659 |
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Sprache: | eng |
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Zusammenfassung: | In photoconductance (PC) based carrier lifetime measurement, artificially high values at low-to-medium injection levels are often observed because of the presence of minority carrier traps in the sample. In this paper, we demonstrate that the traps in n-type Czochralski silicon are in a transient regime under the typical quasi-steady-state measurement condition. The trap-associated apparent lifetime in such a transient regime is different from the one in the steady-state condition; thus, traps should be analyzed according to their actual measurement condition. We demonstrate and subsequently propose a method to extract the majority carrier capture the cross section of traps from transient PC decay measurements. Based on different assumptions, the proposed method is complementary to the method proposed by Hornbeck and Haynes. The proposed method is demonstrated with transient PC measurements of a trap in n-type Czochralski silicon wafers. |
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ISSN: | 2156-3381 2156-3403 |
DOI: | 10.1109/JPHOTOV.2019.2903584 |