Bitline Charge-Recycling SRAM Write Assist Circuitry for V} Improvement and Energy Saving

Bitline (BL) charge-recycling-based static random access memory (SRAM) write assist circuits (BCR-WA) are proposed to reduce the minimum operating voltage (V MIN ) of SRAM. In the proposed schemes, the charges stored on the unselected BL are utilized to raise the cell ground voltage (VSS) of the sel...

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Veröffentlicht in:	IEEE journal of solid-state circuits 2019-03, Vol.54 (3), p.896-906
Hauptverfasser:	Jeong, Hanwool, Oh, Se Hyeok, Oh, Tae Woo, Kim, Hoonki, Park, Chang Nam, Rim, Woojin, Song, Taejoong, Jung, Seong-Ook
Format:	Artikel
Sprache:	eng
Schlagworte:	Capacitance Charge recycling Circuit stability Integrated circuit modeling low-power static random access memory (SRAM) Metals minimum operating voltage of SRAM Random access memory Routing SRAM write assist circuit Transistors
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