A prototype low-noise sixty-four channel readout card for the PHENIX muon tracker cathode strip detector subsystem

The development and test results of a prototype sixty-four channel readout card with emphasis on the eight-channel preamplifier/shaping amplifier ASIC design and performance are presented. Design objectives for the preamplifier include; less than 3000 electrons (rms) of noise for 150 pF of detector capacitance, integration time of 700 ns to 1 us over the range of detector capacitance values from 10 pF to 250 pF, return to baseline of less than 100 us, gain of about 3.5 mV/fC and 11 bits of dynamic range. The nominal power consumption is about 70 mA at a supply voltage of 5V. The readout card design integrates eight of the preamplifier ASICs and two thirty-two channel AMU/ADC (Analog Memory Unit/Analog to Digital Converter (12-bit)) ASICs onto a 6U format printed circuit board. Both ASICs were designed at Oak Ridge National Laboratory while the readout card was designed at Los Alamos National Laboratory.