Cryogenic Characterization of 28-nm FD-SOI Ring Oscillators With Energy Efficiency Optimization
Extensive electrical characterization of ring oscillators (ROs) made in high- {k} metal gate 28-nm fully depleted silicon-on-insulator technology is presented for a set of temperatures between 296 and 4.3 K. First, delay per stage ( \tau _{P} ), static current ( {I} _{\textsf {STAT}} ), and dynamic...
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| Veröffentlicht in: | IEEE transactions on electron devices 2018-09, Vol.65 (9), p.3682-3688 |
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| creator | Bohuslavskyi, H. Barraud, S. Barral, V. Casse, M. Le Guevel, L. Hutin, L. Bertrand, B. Crippa, A. Jehl, X. Pillonnet, G. Jansen, A. G. M. Arnaud, F. Galy, P. Maurand, R. De Franceschi, S. Sanquer, M. Vinet, M. |
| description | Extensive electrical characterization of ring oscillators (ROs) made in high- {k} metal gate 28-nm fully depleted silicon-on-insulator technology is presented for a set of temperatures between 296 and 4.3 K. First, delay per stage ( \tau _{P} ), static current ( {I} _{\textsf {STAT}} ), and dynamic current ( {I} _{\textsf {DYN}} ) are analyzed for the case of the increase of threshold voltage ( {V} _{\textsf {TH}} ) observed at low temperature. Then, the same analysis is performed by compensating {V} _{\textsf {TH}} to a constant, temperature-independent value through forward body biasing (FBB). Energy efficiency optimization is proposed for different supply voltages ( {V} _{\textsf {DD}} ) in order to find an optimal operating point combining both high RO frequencies and low-power dissipation. We show that the Energy-Delay product can be significantly reduced at low temperature by applying an FBB voltage ( {V} _{\textsf {FBB}} ). We demonstrate that outstanding performance of RO in terms of speed ( \tau _{P} = \textsf {37} ps) and static current (7nA/stage) can be achieved at 4.3 K with {V} _{\textsf {DD}} reduced down to 0.325 V. |
| doi_str_mv | 10.1109/TED.2018.2859636 |
| format | Article |
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G. M. ; Arnaud, F. ; Galy, P. ; Maurand, R. ; De Franceschi, S. ; Sanquer, M. ; Vinet, M.</creator><creatorcontrib>Bohuslavskyi, H. ; Barraud, S. ; Barral, V. ; Casse, M. ; Le Guevel, L. ; Hutin, L. ; Bertrand, B. ; Crippa, A. ; Jehl, X. ; Pillonnet, G. ; Jansen, A. G. M. ; Arnaud, F. ; Galy, P. ; Maurand, R. ; De Franceschi, S. ; Sanquer, M. ; Vinet, M.</creatorcontrib><description><![CDATA[Extensive electrical characterization of ring oscillators (ROs) made in high-<inline-formula> <tex-math notation="LaTeX">{k} </tex-math></inline-formula> metal gate 28-nm fully depleted silicon-on-insulator technology is presented for a set of temperatures between 296 and 4.3 K. First, delay per stage (<inline-formula> <tex-math notation="LaTeX">\tau _{P} </tex-math></inline-formula>), static current (<inline-formula> <tex-math notation="LaTeX">{I} _{\textsf {STAT}} </tex-math></inline-formula>), and dynamic current (<inline-formula> <tex-math notation="LaTeX">{I} _{\textsf {DYN}} </tex-math></inline-formula>) are analyzed for the case of the increase of threshold voltage (<inline-formula> <tex-math notation="LaTeX">{V} _{\textsf {TH}} </tex-math></inline-formula>) observed at low temperature. Then, the same analysis is performed by compensating <inline-formula> <tex-math notation="LaTeX">{V} _{\textsf {TH}} </tex-math></inline-formula> to a constant, temperature-independent value through forward body biasing (FBB). Energy efficiency optimization is proposed for different supply voltages (<inline-formula> <tex-math notation="LaTeX">{V} _{\textsf {DD}} </tex-math></inline-formula>) in order to find an optimal operating point combining both high RO frequencies and low-power dissipation. We show that the Energy-Delay product can be significantly reduced at low temperature by applying an FBB voltage (<inline-formula> <tex-math notation="LaTeX">{V} _{\textsf {FBB}} </tex-math></inline-formula>). We demonstrate that outstanding performance of RO in terms of speed (<inline-formula> <tex-math notation="LaTeX">\tau _{P} = \textsf {37} </tex-math></inline-formula> ps) and static current (7nA/stage) can be achieved at 4.3 K with <inline-formula> <tex-math notation="LaTeX">{V} _{\textsf {DD}} </tex-math></inline-formula> reduced down to 0.325 V.]]></description><identifier>ISSN: 0018-9383</identifier><identifier>EISSN: 1557-9646</identifier><identifier>DOI: 10.1109/TED.2018.2859636</identifier><identifier>CODEN: IETDAI</identifier><language>eng</language><publisher>New York: IEEE</publisher><subject>28-nm fully depleted silicon-on-insulator (FD-SOI) ; body biasing ; cryogenic electronics ; Cryogenics ; Delay ; Delays ; Electrical properties ; Energy efficiency ; Engineering Sciences ; Logic gates ; Micro and nanotechnologies ; Microelectronics ; MOS devices ; Optimization ; Oscillators ; Power efficiency ; quantum computing ; ring oscillator (RO) ; SOI (semiconductors) ; Temperature ; Temperature distribution ; Threshold voltage ; Transistors ; ultralow power</subject><ispartof>IEEE transactions on electron devices, 2018-09, Vol.65 (9), p.3682-3688</ispartof><rights>Copyright The Institute of Electrical and Electronics Engineers, Inc. (IEEE) 2018</rights><rights>Distributed under a Creative Commons Attribution 4.0 International License</rights><lds50>peer_reviewed</lds50><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed><citedby>FETCH-LOGICAL-c414t-a978b11316c0adb3823dd2e049273e2cbbb3e09a88739f514bd534a9c33d561b3</citedby><cites>FETCH-LOGICAL-c414t-a978b11316c0adb3823dd2e049273e2cbbb3e09a88739f514bd534a9c33d561b3</cites><orcidid>0000-0002-5342-9818 ; 0000-0003-0539-7185 ; 0000-0001-7785-1186 ; 0000-0002-1347-9693 ; 0000-0002-8706-9902 ; 0000-0002-2968-611X ; 0000-0001-6757-295X ; 0000-0003-3110-3371 ; 0000-0002-7592-7914 ; 0000-0002-4934-2445 ; 0000-0001-6429-3867 ; 0000-0001-6055-4046</orcidid></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://ieeexplore.ieee.org/document/8440625$$EHTML$$P50$$Gieee$$H</linktohtml><link.rule.ids>230,314,780,784,796,885,27924,27925,54758</link.rule.ids><linktorsrc>$$Uhttps://ieeexplore.ieee.org/document/8440625$$EView_record_in_IEEE$$FView_record_in_$$GIEEE</linktorsrc><backlink>$$Uhttps://hal.science/hal-01887151$$DView record in HAL$$Hfree_for_read</backlink></links><search><creatorcontrib>Bohuslavskyi, H.</creatorcontrib><creatorcontrib>Barraud, S.</creatorcontrib><creatorcontrib>Barral, V.</creatorcontrib><creatorcontrib>Casse, M.</creatorcontrib><creatorcontrib>Le Guevel, L.</creatorcontrib><creatorcontrib>Hutin, L.</creatorcontrib><creatorcontrib>Bertrand, B.</creatorcontrib><creatorcontrib>Crippa, A.</creatorcontrib><creatorcontrib>Jehl, X.</creatorcontrib><creatorcontrib>Pillonnet, G.</creatorcontrib><creatorcontrib>Jansen, A. G. M.</creatorcontrib><creatorcontrib>Arnaud, F.</creatorcontrib><creatorcontrib>Galy, P.</creatorcontrib><creatorcontrib>Maurand, R.</creatorcontrib><creatorcontrib>De Franceschi, S.</creatorcontrib><creatorcontrib>Sanquer, M.</creatorcontrib><creatorcontrib>Vinet, M.</creatorcontrib><title>Cryogenic Characterization of 28-nm FD-SOI Ring Oscillators With Energy Efficiency Optimization</title><title>IEEE transactions on electron devices</title><addtitle>TED</addtitle><description><![CDATA[Extensive electrical characterization of ring oscillators (ROs) made in high-<inline-formula> <tex-math notation="LaTeX">{k} </tex-math></inline-formula> metal gate 28-nm fully depleted silicon-on-insulator technology is presented for a set of temperatures between 296 and 4.3 K. First, delay per stage (<inline-formula> <tex-math notation="LaTeX">\tau _{P} </tex-math></inline-formula>), static current (<inline-formula> <tex-math notation="LaTeX">{I} _{\textsf {STAT}} </tex-math></inline-formula>), and dynamic current (<inline-formula> <tex-math notation="LaTeX">{I} _{\textsf {DYN}} </tex-math></inline-formula>) are analyzed for the case of the increase of threshold voltage (<inline-formula> <tex-math notation="LaTeX">{V} _{\textsf {TH}} </tex-math></inline-formula>) observed at low temperature. Then, the same analysis is performed by compensating <inline-formula> <tex-math notation="LaTeX">{V} _{\textsf {TH}} </tex-math></inline-formula> to a constant, temperature-independent value through forward body biasing (FBB). Energy efficiency optimization is proposed for different supply voltages (<inline-formula> <tex-math notation="LaTeX">{V} _{\textsf {DD}} </tex-math></inline-formula>) in order to find an optimal operating point combining both high RO frequencies and low-power dissipation. We show that the Energy-Delay product can be significantly reduced at low temperature by applying an FBB voltage (<inline-formula> <tex-math notation="LaTeX">{V} _{\textsf {FBB}} </tex-math></inline-formula>). We demonstrate that outstanding performance of RO in terms of speed (<inline-formula> <tex-math notation="LaTeX">\tau _{P} = \textsf {37} </tex-math></inline-formula> ps) and static current (7nA/stage) can be achieved at 4.3 K with <inline-formula> <tex-math notation="LaTeX">{V} _{\textsf {DD}} </tex-math></inline-formula> reduced down to 0.325 V.]]></description><subject>28-nm fully depleted silicon-on-insulator (FD-SOI)</subject><subject>body biasing</subject><subject>cryogenic electronics</subject><subject>Cryogenics</subject><subject>Delay</subject><subject>Delays</subject><subject>Electrical properties</subject><subject>Energy efficiency</subject><subject>Engineering Sciences</subject><subject>Logic gates</subject><subject>Micro and nanotechnologies</subject><subject>Microelectronics</subject><subject>MOS devices</subject><subject>Optimization</subject><subject>Oscillators</subject><subject>Power efficiency</subject><subject>quantum computing</subject><subject>ring oscillator (RO)</subject><subject>SOI (semiconductors)</subject><subject>Temperature</subject><subject>Temperature distribution</subject><subject>Threshold voltage</subject><subject>Transistors</subject><subject>ultralow power</subject><issn>0018-9383</issn><issn>1557-9646</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2018</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kMFLwzAUxoMoOKd3wUvAk4fOvCRtk-PoOjcYDHTiMaRpumVs7Uw6Yf71dnR4erz3fu_jex9Cj0BGAES-rvLJiBIQIypimbDkCg0gjtNIJjy5RgPSrSLJBLtFdyFsuzbhnA6QyvypWdvaGZxttNemtd796tY1NW4qTEVU7_F0En0s5_jd1Wu8DMbtdrptfMBfrt3gvLZ-fcJ5VTnjbG1OeHlo3f4ico9uKr0L9uFSh-hzmq-yWbRYvs2z8SIyHHgbaZmKAoBBYoguCyYoK0tqCZc0ZZaaoiiYJVILkTJZxcCLMmZcS8NYGSdQsCF66XU3eqcO3u21P6lGOzUbL9R51v0vUojhBzr2uWcPvvk-2tCqbXP0dWdPUYD07IKnHUV6yvgmBG-rf1kg6hy56iJX58jVJfLu5Kk_cdbaf1xwThIasz_ZEHrZ</recordid><startdate>20180901</startdate><enddate>20180901</enddate><creator>Bohuslavskyi, H.</creator><creator>Barraud, S.</creator><creator>Barral, V.</creator><creator>Casse, M.</creator><creator>Le Guevel, L.</creator><creator>Hutin, L.</creator><creator>Bertrand, B.</creator><creator>Crippa, A.</creator><creator>Jehl, X.</creator><creator>Pillonnet, G.</creator><creator>Jansen, A. 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M.</creatorcontrib><creatorcontrib>Arnaud, F.</creatorcontrib><creatorcontrib>Galy, P.</creatorcontrib><creatorcontrib>Maurand, R.</creatorcontrib><creatorcontrib>De Franceschi, S.</creatorcontrib><creatorcontrib>Sanquer, M.</creatorcontrib><creatorcontrib>Vinet, M.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 2005-present</collection><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Hyper Article en Ligne (HAL)</collection><collection>Hyper Article en Ligne (HAL) (Open Access)</collection><jtitle>IEEE transactions on electron devices</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Bohuslavskyi, H.</au><au>Barraud, S.</au><au>Barral, V.</au><au>Casse, M.</au><au>Le Guevel, L.</au><au>Hutin, L.</au><au>Bertrand, B.</au><au>Crippa, A.</au><au>Jehl, X.</au><au>Pillonnet, G.</au><au>Jansen, A. G. M.</au><au>Arnaud, F.</au><au>Galy, P.</au><au>Maurand, R.</au><au>De Franceschi, S.</au><au>Sanquer, M.</au><au>Vinet, M.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Cryogenic Characterization of 28-nm FD-SOI Ring Oscillators With Energy Efficiency Optimization</atitle><jtitle>IEEE transactions on electron devices</jtitle><stitle>TED</stitle><date>2018-09-01</date><risdate>2018</risdate><volume>65</volume><issue>9</issue><spage>3682</spage><epage>3688</epage><pages>3682-3688</pages><issn>0018-9383</issn><eissn>1557-9646</eissn><coden>IETDAI</coden><abstract><![CDATA[Extensive electrical characterization of ring oscillators (ROs) made in high-<inline-formula> <tex-math notation="LaTeX">{k} </tex-math></inline-formula> metal gate 28-nm fully depleted silicon-on-insulator technology is presented for a set of temperatures between 296 and 4.3 K. First, delay per stage (<inline-formula> <tex-math notation="LaTeX">\tau _{P} </tex-math></inline-formula>), static current (<inline-formula> <tex-math notation="LaTeX">{I} _{\textsf {STAT}} </tex-math></inline-formula>), and dynamic current (<inline-formula> <tex-math notation="LaTeX">{I} _{\textsf {DYN}} </tex-math></inline-formula>) are analyzed for the case of the increase of threshold voltage (<inline-formula> <tex-math notation="LaTeX">{V} _{\textsf {TH}} </tex-math></inline-formula>) observed at low temperature. Then, the same analysis is performed by compensating <inline-formula> <tex-math notation="LaTeX">{V} _{\textsf {TH}} </tex-math></inline-formula> to a constant, temperature-independent value through forward body biasing (FBB). Energy efficiency optimization is proposed for different supply voltages (<inline-formula> <tex-math notation="LaTeX">{V} _{\textsf {DD}} </tex-math></inline-formula>) in order to find an optimal operating point combining both high RO frequencies and low-power dissipation. We show that the Energy-Delay product can be significantly reduced at low temperature by applying an FBB voltage (<inline-formula> <tex-math notation="LaTeX">{V} _{\textsf {FBB}} </tex-math></inline-formula>). We demonstrate that outstanding performance of RO in terms of speed (<inline-formula> <tex-math notation="LaTeX">\tau _{P} = \textsf {37} </tex-math></inline-formula> ps) and static current (7nA/stage) can be achieved at 4.3 K with <inline-formula> <tex-math notation="LaTeX">{V} _{\textsf {DD}} </tex-math></inline-formula> reduced down to 0.325 V.]]></abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/TED.2018.2859636</doi><tpages>7</tpages><orcidid>https://orcid.org/0000-0002-5342-9818</orcidid><orcidid>https://orcid.org/0000-0003-0539-7185</orcidid><orcidid>https://orcid.org/0000-0001-7785-1186</orcidid><orcidid>https://orcid.org/0000-0002-1347-9693</orcidid><orcidid>https://orcid.org/0000-0002-8706-9902</orcidid><orcidid>https://orcid.org/0000-0002-2968-611X</orcidid><orcidid>https://orcid.org/0000-0001-6757-295X</orcidid><orcidid>https://orcid.org/0000-0003-3110-3371</orcidid><orcidid>https://orcid.org/0000-0002-7592-7914</orcidid><orcidid>https://orcid.org/0000-0002-4934-2445</orcidid><orcidid>https://orcid.org/0000-0001-6429-3867</orcidid><orcidid>https://orcid.org/0000-0001-6055-4046</orcidid><oa>free_for_read</oa></addata></record> |
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| ispartof | IEEE transactions on electron devices, 2018-09, Vol.65 (9), p.3682-3688 |
| issn | 0018-9383 1557-9646 |
| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | 28-nm fully depleted silicon-on-insulator (FD-SOI) body biasing cryogenic electronics Cryogenics Delay Delays Electrical properties Energy efficiency Engineering Sciences Logic gates Micro and nanotechnologies Microelectronics MOS devices Optimization Oscillators Power efficiency quantum computing ring oscillator (RO) SOI (semiconductors) Temperature Temperature distribution Threshold voltage Transistors ultralow power |
| title | Cryogenic Characterization of 28-nm FD-SOI Ring Oscillators With Energy Efficiency Optimization |
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