Cryogenic Characterization of 28-nm FD-SOI Ring Oscillators With Energy Efficiency Optimization

Extensive electrical characterization of ring oscillators (ROs) made in high- {k} metal gate 28-nm fully depleted silicon-on-insulator technology is presented for a set of temperatures between 296 and 4.3 K. First, delay per stage ( \tau _{P} ), static current ( {I} _{\textsf {STAT}} ), and dynamic current ( {I} _{\textsf {DYN}} ) are analyzed for the case of the increase of threshold voltage ( {V} _{\textsf {TH}} ) observed at low temperature. Then, the same analysis is performed by compensating {V} _{\textsf {TH}} to a constant, temperature-independent value through forward body biasing (FBB). Energy efficiency optimization is proposed for different supply voltages ( {V} _{\textsf {DD}} ) in order to find an optimal operating point combining both high RO frequencies and low-power dissipation. We show that the Energy-Delay product can be significantly reduced at low temperature by applying an FBB voltage ( {V} _{\textsf {FBB}} ). We demonstrate that outstanding performance of RO in terms of speed ( \tau _{P} = \textsf {37} ps) and static current (7nA/stage) can be achieved at 4.3 K with {V} _{\textsf {DD}} reduced down to 0.325 V.