RF Performance of a Highly Linear Power Amplifier EDNMOS Transistor on Trap-Rich SOI
Results specific to power amplifiers (PAs) designed using a SOI EDNMOS transistor free of kinks in ID-VD plane and high breakdown voltage are presented. The suppression of the drain current kink and improvement in breakdown voltage are achieved by the omission of the N + source implant step. Instead...
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| Veröffentlicht in: | IEEE electron device letters 2018-09, Vol.39 (9), p.1346-1349 |
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| container_end_page | 1349 |
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| container_issue | 9 |
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| container_title | IEEE electron device letters |
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| creator | Toh, Rui Tze Ang, Diing Shenp Parthasarathy, Shyam Wong, Jen Shuang Yap, Hin Kiong Zhang, Shaoqiang |
| description | Results specific to power amplifiers (PAs) designed using a SOI EDNMOS transistor free of kinks in ID-VD plane and high breakdown voltage are presented. The suppression of the drain current kink and improvement in breakdown voltage are achieved by the omission of the N + source implant step. Instead, the source junction is realized by an optimized NLDD implant step only, allowing the formation of an under-source body contact. This approach is highly suitable for integration with RF switch and low-noise amplifiers on the same thin film SOI substrate. The improved channel conductance is found to give rise to highly linear amplitude and phase characteristics under high power conditions when the optimized EDNMOS device is used standalone as a PA. |
| doi_str_mv | 10.1109/LED.2018.2855442 |
| format | Article |
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The improved channel conductance is found to give rise to highly linear amplitude and phase characteristics under high power conditions when the optimized EDNMOS device is used standalone as a PA.</description><subject>Amplifier design</subject><subject>Breakdown</subject><subject>EDMOS</subject><subject>Electric potential</subject><subject>high-resistivity SOI</subject><subject>Implants</subject><subject>Junctions</subject><subject>kink effect</subject><subject>Logic gates</subject><subject>Performance evaluation</subject><subject>Power amplifiers</subject><subject>Radio frequency</subject><subject>Resistance</subject><subject>RF power amplifier</subject><subject>silicon-on-insulator</subject><subject>Substrates</subject><subject>Thin films</subject><subject>Transistors</subject><issn>0741-3106</issn><issn>1558-0563</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2018</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNo9kM1rAjEUxENpodb2Xugl0PPavGw2mz2KH1XYVlF7DrvZpEZ0YxOl-N83ovT0ZmDmDfwQegbSAyDFWzka9igB0aMiyxijN6gDWSYSkvH0FnVIziBJgfB79BDChhBgLGcdtFqM8Vx74_yuapXGzuAKT-z3envCpW115fHc_WqP-7v91hob1Wj4-TFb4pWv2mDDwXns2rPbJwur1ng5mz6iO1Ntg3663i76Go9Wg0lSzt6ng36ZKMrYIQGRF4WhQGsePdVGK87zhjQN5ykHVgmaE8ZT1dSK1oJx1ZDakEIUaUY4h7SLXi9_9979HHU4yI07-jZOSgqQA4sDNKbIJaW8C8FrI_fe7ip_kkDkmZ2M7OSZnbyyi5WXS8Vqrf_jgkV-pEj_AGsKZx8</recordid><startdate>20180901</startdate><enddate>20180901</enddate><creator>Toh, Rui Tze</creator><creator>Ang, Diing Shenp</creator><creator>Parthasarathy, Shyam</creator><creator>Wong, Jen Shuang</creator><creator>Yap, Hin Kiong</creator><creator>Zhang, Shaoqiang</creator><general>IEEE</general><general>The Institute of Electrical and Electronics Engineers, Inc. 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The suppression of the drain current kink and improvement in breakdown voltage are achieved by the omission of the N + source implant step. Instead, the source junction is realized by an optimized NLDD implant step only, allowing the formation of an under-source body contact. This approach is highly suitable for integration with RF switch and low-noise amplifiers on the same thin film SOI substrate. The improved channel conductance is found to give rise to highly linear amplitude and phase characteristics under high power conditions when the optimized EDNMOS device is used standalone as a PA.</abstract><cop>New York</cop><pub>IEEE</pub><doi>10.1109/LED.2018.2855442</doi><tpages>4</tpages><orcidid>https://orcid.org/0000-0001-6715-7756</orcidid><orcidid>https://orcid.org/0000-0002-8139-1984</orcidid></addata></record> |
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| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | Amplifier design Breakdown EDMOS Electric potential high-resistivity SOI Implants Junctions kink effect Logic gates Performance evaluation Power amplifiers Radio frequency Resistance RF power amplifier silicon-on-insulator Substrates Thin films Transistors |
| title | RF Performance of a Highly Linear Power Amplifier EDNMOS Transistor on Trap-Rich SOI |
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