Parametric fault simulation and test vector generation

Process variation has forever been the major fail cause of analog circuits where small deviations in component values cause large deviations in the measured output parameters. This paper presents a new approach for parametric fault simulation and test vector generation. The proposed approach utilize...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Saab, K., Ben-Hamida, N., Kaminska, B.
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Analog integrated circuits Artificial neural networks Automatic testing Circuit faults Circuit testing Digital integrated circuits Electrical capacitance tomography Integrated circuit testing Low voltage Reactive power
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