Preconditioned BTI on 4H-SiC: Proposal for a Nearly Delay Time-Independent Measurement Technique

When using JEDEC-like measurement patterns, MOSFETs based on 4H-SiC show amplified voltage shifts during gate bias stress compared to their silicon-based counterparts. We show that the majority of the extracted voltage shift originates from fully reversible components and strongly relies on stress-independent measurement conditions such as the reference point for the calculation of the voltage shift and timing parameters. An enhanced bias temperature instability measurement technique using device preconditioning is presented and compared to standard JEDEC-like measurement patterns developed for bias temperature instability evaluation of silicon MOSFETs. We show that preconditioned measurements allow for accurate and nearly delay and recovery time independent extraction of the permanent component within typical industrial timescales.