Ultralow-Power (1.59 mW/Gbps), 56-Gbps PAM4 Operation of Si Photonic Transmitter Integrating Segmented PIN Mach–Zehnder Modulator and 28-nm CMOS Driver

A highly power-efficient silicon (Si) photonic PAM4 transmitter was developed by integrating a Si segmented Mach-Zehnder modulator and a CMOS driver chip. Si p-i-n-type phase shifters are directly driven with a CMOS inverter driver array to realize a low power operation. A passive RC equalizing tech...

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Veröffentlicht in:Journal of lightwave technology 2018-03, Vol.36 (5), p.1275-1280
Hauptverfasser: Tanaka, Shinsuke, Simoyama, Takasi, Aoki, Tsuyoshi, Mori, Toshihiko, Sekiguchi, Shigeaki, Jeong, Seok-Hwan, Usuki, Tatsuya, Tanaka, Yu, Morito, Ken
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Sprache:eng
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Zusammenfassung:A highly power-efficient silicon (Si) photonic PAM4 transmitter was developed by integrating a Si segmented Mach-Zehnder modulator and a CMOS driver chip. Si p-i-n-type phase shifters are directly driven with a CMOS inverter driver array to realize a low power operation. A passive RC equalizing technique was adopted to extend the modulation bandwidth up to 20 GHz while maintaining a low power consumption. By integrating a passive RC filter within the photonics chip, we achieved a very compact foot print for the transmitter (450 × 950 μ m). The fabricated modulator exhibited a low VπL of 0.19 V·cm and a moderate insertion loss of 23.7 dB/cm. The transmitter successfully demonstrated clear eye openings of PAM4 signal up to 56 Gbps together with a record-high-efficiency of 1.59 mW/Gbps. A low bit-error-rate below KP4 FEC limit (
ISSN:0733-8724
1558-2213
DOI:10.1109/JLT.2018.2799965