Comparison Between High-Holding-Voltage SCR and Stacked Low-Voltage Devices for ESD Protection in High-Voltage Applications

The modified silicon-controlled rectifier (SCR) fabricated in a 0.25- \mu \text{m} high-voltage (HV) bipolar-CMOS-DMOS (BCD) technology has been proposed to seek for both effective electrostatic discharge (ESD) protection and latchup immunity. Experimental results show that one of the proposed SCRs has a high holding voltage of up to ~30 V in the 100-ns transmission line pulsing measurement results. However, through the experimental verification by using the transient latchup test, the holding voltage of such proposed device decreases to ~20 V. It is due to the increased bipolar junction transistor current gains of the SCR path induced by the Joule-heating effect in the long-term measurement. For 20-V circuit applications, the ESD robustness of the proposed SCR with a holding voltage of ~20 V is lower than that of stacked low-voltage p-type MOS in the previous studies. Developing special modification of such HV devices is inefficient to achieve both effective ESD protection and latchup-free design in this 0.25- \mu \text{m} HV BCD technology.