Double precharge TSPC for high-speed dual-modulus prescaler

Double precharge TSPC for high-speed dual-modulus prescaler

A double precharge TSPC D-flip-flop (DFF) is proposed and a 3 GHz dual-modulus prescaler using the double precharge TSPC in 0.35 /spl mu/m CMOS technology is presented in this paper. The double precharge TSPC DFF can reduce setup time compared with the conventional one, so it contributes to enhancin...

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Bibliographische Detailangaben
Hauptverfasser: Kwan-Yeob Chae, Hoon-Jae Ki, In-Chul Hwang, Soo-Won Kim
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Application specific integrated circuits
Clocks
CMOS technology
Counting circuits
Delay effects
Energy consumption
Flip-flops
Frequency conversion
Frequency synthesizers
Logic
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Zusammenfassung:A double precharge TSPC D-flip-flop (DFF) is proposed and a 3 GHz dual-modulus prescaler using the double precharge TSPC in 0.35 /spl mu/m CMOS technology is presented in this paper. The double precharge TSPC DFF can reduce setup time compared with the conventional one, so it contributes to enhancing the operating speed of a dual-modulus prescaler. A 128/129 dual-modulus prescaler using the proposed flip-flop shows a maximum operating frequency of 3 GHz with 16 mW power consumption at 3.3 V power supply.
DOI:10.1109/ICVC.1999.821014