An efficient simultaneous switching noise analysis of high density multi-layer packages and PCBs considering the power and ground planes

In today's advanced semiconductor products, the width of the bus and the operating frequency increase. As a result, more simultaneous switching noise (SSN) is observed. However, SSN analysis requires the modeling of power and ground planes. The PEEC (Partial Element Equivalent Circuit) method is often used for modeling the planes but it suffers from a large amount of computation time and the limited size of PCB it can handle. This paper proposes a new fast method of generating an equivalent circuit networks for multi-layer packages and PCBs. A library of parasitics is built for different vertical structures and materials by using a electromagnetic field solver. This library is used to generate the equivalent circuit without the need for the complex field solving procedure. Compared to the conventional method (PEEC), the proposed method drastically reduces the time and effort for generating the equivalent circuit model with the same accuracy. This method has been used to design a variety of high speed memory module products.