On-chip wiring design challenges for GHz operation
This presentation reviews current on-chip wiring design practices and the fundamental properties of on-chip lossy transmission lines. The deficiencies of RC-circuit representation are highlighted and it is shown that many of the modeling and simulation techniques developed for package interconnectio...
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| creator | Deutsch, A. Smith, H. Kopcsay, G.V. Edelstein, D.C. Coteus, P.W. |
| description | This presentation reviews current on-chip wiring design practices and the fundamental properties of on-chip lossy transmission lines. The deficiencies of RC-circuit representation are highlighted and it is shown that many of the modeling and simulation techniques developed for package interconnections must be adopted by microprocessor designers in order to achieve GHz clock rates. |
| doi_str_mv | 10.1109/EPEP.1999.819190 |
| format | Conference Proceeding |
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The deficiencies of RC-circuit representation are highlighted and it is shown that many of the modeling and simulation techniques developed for package interconnections must be adopted by microprocessor designers in order to achieve GHz clock rates.</description><identifier>ISBN: 9780780355972</identifier><identifier>ISBN: 0780355970</identifier><identifier>DOI: 10.1109/EPEP.1999.819190</identifier><language>eng</language><publisher>IEEE</publisher><subject>Circuit noise ; Clocks ; Crosstalk ; Driver circuits ; Integrated circuit interconnections ; Packaging ; Propagation delay ; RLC circuits ; System-on-a-chip ; Wiring</subject><ispartof>IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. 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| fulltext | fulltext_linktorsrc |
| identifier | ISBN: 9780780355972 |
| ispartof | IEEE 8th Topical Meeting on Electrical Performance of Electronic Packaging (Cat. No.99TH8412), 1999, p.45-48 |
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| language | eng |
| recordid | cdi_ieee_primary_819190 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Circuit noise Clocks Crosstalk Driver circuits Integrated circuit interconnections Packaging Propagation delay RLC circuits System-on-a-chip Wiring |
| title | On-chip wiring design challenges for GHz operation |
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