A simulator-optimizer for the design of very low phase noise CMOS LC-oscillators

A simulator-optimizer program for spiral inductors on silicon substrates is presented. The program implements the three-dimensional inductance extraction program FastHenry in a simulated annealing optimization loop. The simulated annealing algorithm performs the optimization of automatically generated spiral inductor geometries towards an optimal quality factor for a specified technology. Using the program, a low-phase-noise LC-tank Voltage Controlled Oscillator (VCO) is integrated in a 0.65 /spl mu/m BiCMOS process. The phase noise is as low as -127.5 dBc/Hz at an offset frequency of 600 kHz from a 1.33 GHz carrier, while consuming only 10 mA from a 2 V power supply.