Voltage regulator module (VRM) transient modeling and analysis

In this paper, the transient response of the voltage regulator module (VRM) output voltage when the processor has a sudden load change is analyzed. The parasitic parameters play important roles in the transient. The system can be divided into several resonant loops. Each loop can be considered appro...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Pit-Leong Wong, Lee, F.C., Xunwei Zhou, Jiabin Chen
Format: Tagungsbericht
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:In this paper, the transient response of the voltage regulator module (VRM) output voltage when the processor has a sudden load change is analyzed. The parasitic parameters play important roles in the transient. The system can be divided into several resonant loops. Each loop can be considered approximately as a decoupled second order system. The voltage drop of the capacitor is analyzed. By reducing the inductance and increasing converter bandwidth, the transient of VRM can be improved.
ISSN:0197-2618
2576-702X
DOI:10.1109/IAS.1999.805965