FPGA Implementation of a Low Cost and Flexible Pulse Compression System

The pulse compression techniques in radar systems allow the use of low-power transmitters without affecting neither the maximum range nor the resolution capacity. As part of the implementation of these techniques it is necessary to develop flexible and low cost devices that consume few resources of the available hardware. For these reasons in this article it is addressed a FPGA implementation of a system that synthesizes a phase manipulated signal with great duration-bandwidth product, which duration and frequency are adjustable. Furthermore, a significant change in the compressor's phase detectors is proposed, replacing the commonly used lowpass filters by a moving average filter. The new phase detectors require a single multiplier for implementation, reducing consumption of FPGA logic elements.