Monolithic Three-Dimensional 65-nm CMOS-Nanoelectromechanical Reconfigurable Logic for Sub-1.2-V Operation

Monolithic three-dimensional (M3D) CMOS-nanoelectromechanical (CMOS-NEM) reconfigurable logic (RL) circuits are experimentally demonstrated. This is the first experimental demonstration of 65-nm M3D CMOS-NEM RL circuits satisfying the 1.2-V supply voltage (VDD) requirement of the 65-nm technology no...

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Veröffentlicht in:IEEE electron device letters 2017-09, Vol.38 (9), p.1317-1320
Hauptverfasser: Kwon, Hyug Su, Kim, Seung Kyu, Choi, Woo Young
Format: Artikel
Sprache:eng
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Zusammenfassung:Monolithic three-dimensional (M3D) CMOS-nanoelectromechanical (CMOS-NEM) reconfigurable logic (RL) circuits are experimentally demonstrated. This is the first experimental demonstration of 65-nm M3D CMOS-NEM RL circuits satisfying the 1.2-V supply voltage (VDD) requirement of the 65-nm technology node. The fabrication process is identical to the conventional 65-nm CMOS baseline process, in which copper NEM memory switches are formed by a dual damascene process.
ISSN:0741-3106
1558-0563
DOI:10.1109/LED.2017.2726685