Performance Evaluation of 7-nm Node Negative Capacitance FinFET-Based SRAM

We compare the performance of static random access memory (SRAM) cells based on negative capacitance (NC) FinFETs and reference FinFETs at the 7-nm technology node. We use a physics-based model for NC FinFETswhere we couple the Landau-Khalatnikovmodel of ferroelectric materials with the standard BSI...

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Veröffentlicht in:IEEE electron device letters 2017-08, Vol.38 (8), p.1161-1164
Hauptverfasser: Dutta, Tapas, Pahwa, Girish, Trivedi, Amit Ranjan, Sinha, Saurabh, Agarwal, Amit, Chauhan, Yogesh Singh
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Sprache:eng
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Zusammenfassung:We compare the performance of static random access memory (SRAM) cells based on negative capacitance (NC) FinFETs and reference FinFETs at the 7-nm technology node. We use a physics-based model for NC FinFETswhere we couple the Landau-Khalatnikovmodel of ferroelectric materials with the standard BSIM-CMG model of FinFET. For the reference FinFETs, we use the predictive model parameters optimized for SRAM design as per the ASAP7 PDK. We exploit the unique characteristics of NC-FinFETs and demonstrate that for ferroelectric thickness below a critical value, SRAMs with higher hold and read stability, better write-ability, lower leakage as well as faster read access time can be designed at the cost of increased write delay.
ISSN:0741-3106
1558-0563
DOI:10.1109/LED.2017.2712365