A methodology and design environment for DSP ASIC fixed point refinement

A methodology and design environment for DSP ASIC fixed point refinement

Complex signal processing algorithms are specified in floating point precision. When their hardware implementation requires fixed point precision, type refinement is needed. The paper presents a methodology and design environment for this quantization process. The method uses independent strategies...

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Bibliographische Detailangaben
Hauptverfasser: Cmar, R., Rijnders, L., Schaumont, P., Vernalde, S., Bolsens, I.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Analytical models
Application specific integrated circuits
Design methodology
Digital signal processing
Electrical capacitance tomography
Modems
Monitoring
Quantization
Signal processing
Signal processing algorithms
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Beschreibung
Zusammenfassung:Complex signal processing algorithms are specified in floating point precision. When their hardware implementation requires fixed point precision, type refinement is needed. The paper presents a methodology and design environment for this quantization process. The method uses independent strategies for fixing MSB and LSB weights of fixed point signals. It enables short design cycles by combining the strengths of both analytical and simulation based methods.
DOI:10.1109/DATE.1999.761133