A low-power DSP core-based software radio architecture
This paper describes an approach to developing a low-power digital signal processor (DSP) subsystem architecture for advanced software radio platforms. The architecture is intended to support next-generation wide-band spread-spectrum military waveforms. The methodology illustrates how a next-generat...
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| Veröffentlicht in: | IEEE journal on selected areas in communications 1999-04, Vol.17 (4), p.574-590 |
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| container_title | IEEE journal on selected areas in communications |
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| creator | Gunn, J.E. Barron, K.S. Ruczczyk, W. |
| description | This paper describes an approach to developing a low-power digital signal processor (DSP) subsystem architecture for advanced software radio platforms. The architecture is intended to support next-generation wide-band spread-spectrum military waveforms. The methodology illustrates how a next-generation programmable DSP core forms the basis for an application-specific integrated circuit (ASIC). It also shows how semiconductor technologies can be integrated into such chips to achieve algorithm performance while minimizing subsystem power consumption. The ASIC is run-time configurable to maintain high flexibility. The range of RF channel modulation ("waveforms") and air interfaces is intended to include both wide-band and traditional narrow-band waveforms. Estimated gate counts and power-consumption estimates are presented. DSP circuit-design and power-management strategies necessary to achieve low-power operation are presented. While the architecture discussion focuses on military waveforms, the approach is also applicable to commercial waveforms. |
| doi_str_mv | 10.1109/49.761037 |
| format | Article |
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While the architecture discussion focuses on military waveforms, the approach is also applicable to commercial waveforms.</description><subject>Application specific integrated circuits</subject><subject>Architecture</subject><subject>Architecture (computers)</subject><subject>Computer architecture</subject><subject>Digital signal processing</subject><subject>Digital signal processing chips</subject><subject>Digital signal processors</subject><subject>Integrated circuit technology</subject><subject>Military</subject><subject>Run time (computers)</subject><subject>Semiconductors</subject><subject>Signal processing algorithms</subject><subject>Software radio</subject><subject>Spread spectrum communication</subject><subject>Waveforms</subject><subject>Wideband</subject><issn>0733-8716</issn><issn>1558-0008</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>1999</creationdate><recordtype>article</recordtype><sourceid>RIE</sourceid><recordid>eNqF0EtLAzEUBeAgCtbqwq2rWSkuUm9ek2RZ6hMKCup6yGRucGRqajKl-O8dmeJSVwfu-biLQ8gpgxljYK-knemSgdB7ZMKUMhQAzD6ZgBaCGs3KQ3KU8zsAk9LwCSnnRRe3dB23mIrr56fCx4S0dhmbIsfQb13CIrmmjYVL_q3t0febhMfkILgu48kup-T19uZlcU-Xj3cPi_mSeiGhp42XEoXVkpdSlsCZ4nVQRoBoamlErbw0frhwsEGoOoRGoVFe-6AFlF6JKbkY_65T_Nxg7qtVmz12nfvAuMmVZdaCBSMGef6n5MZypQf5PxSSWWkHeDlCn2LOCUO1Tu3Kpa-KQfUzdiVtNY492LPRtoj463blN5TEdzQ</recordid><startdate>19990401</startdate><enddate>19990401</enddate><creator>Gunn, J.E.</creator><creator>Barron, K.S.</creator><creator>Ruczczyk, W.</creator><general>IEEE</general><scope>RIA</scope><scope>RIE</scope><scope>AAYXX</scope><scope>CITATION</scope><scope>7SP</scope><scope>8FD</scope><scope>L7M</scope><scope>7U5</scope><scope>F28</scope><scope>FR3</scope></search><sort><creationdate>19990401</creationdate><title>A low-power DSP core-based software radio architecture</title><author>Gunn, J.E. ; Barron, K.S. ; Ruczczyk, W.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c340t-dc44e39742644602152bf58303db483b5c48cbf5209f35bffd5e85c7cf7306c53</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>1999</creationdate><topic>Application specific integrated circuits</topic><topic>Architecture</topic><topic>Architecture (computers)</topic><topic>Computer architecture</topic><topic>Digital signal processing</topic><topic>Digital signal processing chips</topic><topic>Digital signal processors</topic><topic>Integrated circuit technology</topic><topic>Military</topic><topic>Run time (computers)</topic><topic>Semiconductors</topic><topic>Signal processing algorithms</topic><topic>Software radio</topic><topic>Spread spectrum communication</topic><topic>Waveforms</topic><topic>Wideband</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Gunn, J.E.</creatorcontrib><creatorcontrib>Barron, K.S.</creatorcontrib><creatorcontrib>Ruczczyk, W.</creatorcontrib><collection>IEEE All-Society Periodicals Package (ASPP) 1998-Present</collection><collection>IEEE Electronic Library (IEL)</collection><collection>CrossRef</collection><collection>Electronics & Communications Abstracts</collection><collection>Technology Research Database</collection><collection>Advanced Technologies Database with Aerospace</collection><collection>Solid State and Superconductivity Abstracts</collection><collection>ANTE: Abstracts in New Technology & Engineering</collection><collection>Engineering Research Database</collection><jtitle>IEEE journal on selected areas in communications</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Gunn, J.E.</au><au>Barron, K.S.</au><au>Ruczczyk, W.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>A low-power DSP core-based software radio architecture</atitle><jtitle>IEEE journal on selected areas in communications</jtitle><stitle>J-SAC</stitle><date>1999-04-01</date><risdate>1999</risdate><volume>17</volume><issue>4</issue><spage>574</spage><epage>590</epage><pages>574-590</pages><issn>0733-8716</issn><eissn>1558-0008</eissn><coden>ISACEM</coden><abstract>This paper describes an approach to developing a low-power digital signal processor (DSP) subsystem architecture for advanced software radio platforms. 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| ispartof | IEEE journal on selected areas in communications, 1999-04, Vol.17 (4), p.574-590 |
| issn | 0733-8716 1558-0008 |
| language | eng |
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| source | IEEE Electronic Library (IEL) |
| subjects | Application specific integrated circuits Architecture Architecture (computers) Computer architecture Digital signal processing Digital signal processing chips Digital signal processors Integrated circuit technology Military Run time (computers) Semiconductors Signal processing algorithms Software radio Spread spectrum communication Waveforms Wideband |
| title | A low-power DSP core-based software radio architecture |
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